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| author | Hal Finkel <hfinkel@anl.gov> | 2014-05-11 19:29:11 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-05-11 19:29:11 +0000 |
| commit | 70a83b490ea9e2e9c5ae4991a8c71248467974c8 (patch) | |
| tree | fd1b86d25cf4b3a6f29d80b7943f4048ae56b5c7 /lib/Target/PowerPC/PPCISelLowering.h | |
| parent | 24f554f05277413fd8ec77f80c3241d0298ab57f (diff) | |
| download | llvm-70a83b490ea9e2e9c5ae4991a8c71248467974c8.tar.gz llvm-70a83b490ea9e2e9c5ae4991a8c71248467974c8.tar.bz2 llvm-70a83b490ea9e2e9c5ae4991a8c71248467974c8.tar.xz | |
[PowerPC] Add global named register support
Support for the intrinsics that read from and write to global named registers
is added for r1, r2 and r13 (depending on the subtarget).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208509 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index f05f5dd6a6..98bdf26643 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -398,6 +398,8 @@ namespace llvm { SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; + unsigned getRegisterByName(const char* RegName, EVT VT) const override; + void computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, |