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authorChris Lattner <sabre@nondot.org>2006-04-04 17:25:31 +0000
committerChris Lattner <sabre@nondot.org>2006-04-04 17:25:31 +0000
commit7ff7e674580adad7a5bccdbd74cf9c9f05e46d0f (patch)
tree3ae6c61ce0b9328b0abe8a2a07b562a2c1ee1122 /lib/Target/PowerPC/PPCISelLowering.h
parent4352cc9e217e4482ad53f5a7b92c3543f569eb6e (diff)
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Ask legalize to promote all vector shuffles to be v16i8 instead of having to
handle all 4 PPC vector types. This simplifies the matching code and allows us to eliminate a bunch of patterns. This also adds cases we were missing, such as CodeGen/PowerPC/vec_splat.ll:splat_h. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h
index 2fe79ece8c..9e6efb9a7a 100644
--- a/lib/Target/PowerPC/PPCISelLowering.h
+++ b/lib/Target/PowerPC/PPCISelLowering.h
@@ -105,11 +105,11 @@ namespace llvm {
/// isSplatShuffleMask - Return true if the specified VECTOR_SHUFFLE operand
/// specifies a splat of a single element that is suitable for input to
/// VSPLTB/VSPLTH/VSPLTW.
- bool isSplatShuffleMask(SDNode *N);
+ bool isSplatShuffleMask(SDNode *N, unsigned EltSize);
/// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the
/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
- unsigned getVSPLTImmediate(SDNode *N);
+ unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize);
/// isVecSplatImm - Return true if this is a build_vector of constants which
/// can be formed by using a vspltis[bhw] instruction. The ByteSize field