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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-02-20 20:41:42 +0000 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-02-20 20:41:42 +0000 |
| commit | abc402886e407e21d845cccc15723cffd6e2dc20 (patch) | |
| tree | fa874ad96d4341f8bed0efa315a1e52ad433756c /lib/Target/PowerPC/PPCISelLowering.h | |
| parent | 8a3a1deed8e7b18b18dea73cb4245a8ef7c46a4f (diff) | |
| download | llvm-abc402886e407e21d845cccc15723cffd6e2dc20.tar.gz llvm-abc402886e407e21d845cccc15723cffd6e2dc20.tar.bz2 llvm-abc402886e407e21d845cccc15723cffd6e2dc20.tar.xz | |
Additional fixes for bug 15155.
This handles the cases where the 6-bit splat element is odd, converting
to a three-instruction sequence to add or subtract two splats. With this
fix, the XFAIL in test/CodeGen/PowerPC/vec_constants.ll is removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175663 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index 7cc2d1ac32..1fa88f3252 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -238,8 +238,9 @@ namespace llvm { ADDI_DTPREL_L, /// VRRC = VADD_SPLAT Elt, EltSize - Temporary node to be expanded - /// into an ADD of a VSPLTI with itself during instruction selection. - /// Necessary to avoid losing this optimization due to constant folds. + /// during instruction selection to optimize a BUILD_VECTOR into + /// operations on splats. This is necessary to avoid losing these + /// optimizations due to constant folding. VADD_SPLAT, /// STD_32 - This is the STD instruction for use with "32-bit" registers. |