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author | Chris Lattner <sabre@nondot.org> | 2006-04-02 06:26:07 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-04-02 06:26:07 +0000 |
commit | bbe77de450ef36b4f83cc3b57705a9758adbd925 (patch) | |
tree | 9737710952e04c932121d61fc478565ee135fdc9 /lib/Target/PowerPC/PPCISelLowering.h | |
parent | 1b5232a93767eac1424c67fb86580deef97e21e0 (diff) | |
download | llvm-bbe77de450ef36b4f83cc3b57705a9758adbd925.tar.gz llvm-bbe77de450ef36b4f83cc3b57705a9758adbd925.tar.bz2 llvm-bbe77de450ef36b4f83cc3b57705a9758adbd925.tar.xz |
Inform the dag combiner that the predicate compares only return a low bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index bc865c6cb4..2fe79ece8c 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -133,6 +133,11 @@ namespace llvm { virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; + virtual void computeMaskedBitsForTargetNode(const SDOperand Op, + uint64_t Mask, + uint64_t &KnownZero, + uint64_t &KnownOne, + unsigned Depth = 0) const; /// LowerArguments - This hook must be implemented to indicate how we should /// lower the arguments for the specified function, into the specified DAG. virtual std::vector<SDOperand> |