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authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-12-04 16:18:08 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-12-04 16:18:08 +0000
commitd7802bf0ddcac16ee910105922492aee86a53e1b (patch)
tree693685ea4b0a01cef8c62f4f595f9a6e6712c197 /lib/Target/PowerPC/PPCISelLowering.h
parent315f09f422a3c33a44e6d5c2a78f284a9304994d (diff)
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This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF. The patch includes code to handle external assembly and MC output with the integrated assembler. It intentionally does not support the "old" JIT. For the initial-exec TLS model, the ABI requires the following to calculate the address of external thread-local variable x: Code sequence Relocation Symbol ld 9,x@got@tprel(2) R_PPC64_GOT_TPREL16_DS x add 9,9,x@tls R_PPC64_TLS x The register 9 is arbitrary here. The linker will replace x@got@tprel with the offset relative to the thread pointer to the generated GOT entry for symbol x. It will replace x@tls with the thread-pointer register (13). The two test cases verify correct assembly output and relocation output as just described. PowerPC-specific selection node variants are added for the two instructions above: LD_GOT_TPREL and ADD_TLS. These are inserted when an initial-exec global variable is encountered by PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to machine instructions LDgotTPREL and ADD8TLS. LDgotTPREL is a pseudo that uses the same LDrs support added for medium code model's LDtocL, with a different relocation type. The rest of the processing is straightforward. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169281 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h
index c20356c041..f54a8b77a4 100644
--- a/lib/Target/PowerPC/PPCISelLowering.h
+++ b/lib/Target/PowerPC/PPCISelLowering.h
@@ -178,6 +178,20 @@ namespace llvm {
CR6SET,
CR6UNSET,
+ /// G8RC = LD_GOT_TPREL Symbol, G8RReg - Used by the initial-exec
+ /// TLS model, produces a LD instruction with base register G8RReg
+ /// and offset sym@got@tprel. The latter identifies the GOT entry
+ /// containing the offset of "sym" relative to the thread pointer.
+ LD_GOT_TPREL,
+
+ /// G8RC = ADD_TLS G8RReg, Symbol - Used by the initial-exec TLS
+ /// model, produces an ADD instruction that adds the contents of
+ /// G8RReg to the thread pointer. Symbol contains a relocation
+ /// sym@tls which is to be replaced by the thread pointer and
+ /// identifies to the linker that the instruction is part of a
+ /// TLS sequence.
+ ADD_TLS,
+
/// STD_32 - This is the STD instruction for use with "32-bit" registers.
STD_32 = ISD::FIRST_TARGET_MEMORY_OPCODE,