diff options
author | Hal Finkel <hfinkel@anl.gov> | 2014-04-12 21:52:38 +0000 |
---|---|---|
committer | Hal Finkel <hfinkel@anl.gov> | 2014-04-12 21:52:38 +0000 |
commit | f4c3a5601aefe2e6500ff4af394196da55203e52 (patch) | |
tree | 185a843c721a38e499c364fce8f4da718503b1e2 /lib/Target/PowerPC/PPCISelLowering.h | |
parent | df40801dff8bd5e6706fb47afab60e5442a7e518 (diff) | |
download | llvm-f4c3a5601aefe2e6500ff4af394196da55203e52.tar.gz llvm-f4c3a5601aefe2e6500ff4af394196da55203e52.tar.bz2 llvm-f4c3a5601aefe2e6500ff4af394196da55203e52.tar.xz |
[PowerPC] Implement some additional TLI callbacks
Add implementations of:
bool isLegalICmpImmediate(int64_t Imm) const
bool isLegalAddImmediate(int64_t Imm) const
bool isTruncateFree(Type *Ty1, Type *Ty2) const
bool isTruncateFree(EVT VT1, EVT VT2) const
bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const
Unfortunately, this regresses counter-register-based loop formation because
some of the loops now end up in forms were SE cannot compute loop counts.
However, nevertheless, the test-suite results favor committing:
SingleSource/Benchmarks/BenchmarkGame/puzzle: 26% speedup
MultiSource/Benchmarks/FreeBench/analyzer/analyzer: 21% speedup
MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan: 20% speedup
SingleSource/Benchmarks/Polybench/linear-algebra/kernels/trisolv/trisolv: 19% speedup
SingleSource/Benchmarks/Polybench/linear-algebra/kernels/gesummv/gesummv: 15% speedup
MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2: 2% speedup
MultiSource/Benchmarks/VersaBench/bmm/bmm: 26% slowdown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206120 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index da6d4dcc3a..497937624e 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -447,6 +447,29 @@ namespace llvm { /// by AM is legal for this target, for a load/store of the specified type. virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const; + /// isLegalICmpImmediate - Return true if the specified immediate is legal + /// icmp immediate, that is the target has icmp instructions which can + /// compare a register against the immediate without having to materialize + /// the immediate into a register. + bool isLegalICmpImmediate(int64_t Imm) const override; + + /// isLegalAddImmediate - Return true if the specified immediate is legal + /// add immediate, that is the target has add instructions which can + /// add a register and the immediate without having to materialize + /// the immediate into a register. + bool isLegalAddImmediate(int64_t Imm) const override; + + /// isTruncateFree - Return true if it's free to truncate a value of + /// type Ty1 to type Ty2. e.g. On PPC it's free to truncate a i64 value in + /// register X1 to i32 by referencing its sub-register R1. + bool isTruncateFree(Type *Ty1, Type *Ty2) const override; + bool isTruncateFree(EVT VT1, EVT VT2) const override; + + /// \brief Returns true if it is beneficial to convert a load of a constant + /// to just the constant itself. + bool shouldConvertConstantLoadToIntImm(const APInt &Imm, + Type *Ty) const override; + virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; /// getOptimalMemOpType - Returns the target specific optimal type for load |