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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-04-26 15:39:12 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-04-26 15:39:12 +0000 |
| commit | 1adc97c901e1c42d4f31981a3604d607581c31c3 (patch) | |
| tree | 10dd740a65f5fb75a0ff6941195ccb98861ab2a4 /lib/Target/PowerPC/PPCInstrFormats.td | |
| parent | 8ade90930863acf94fbb2ccd91acefcf114c1f3e (diff) | |
| download | llvm-1adc97c901e1c42d4f31981a3604d607581c31c3.tar.gz llvm-1adc97c901e1c42d4f31981a3604d607581c31c3.tar.bz2 llvm-1adc97c901e1c42d4f31981a3604d607581c31c3.tar.xz | |
PowerPC: Fix encoding of rldimi and rldcl instructions
When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong operand name in rldimi, wrong form
and sub-opcode for rldcl).
Tests will be added together with the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180606 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrFormats.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 36f193be99..41b4e017e6 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -855,6 +855,25 @@ class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr, let Inst{31} = RC; } +class MDSForm_1<bits<6> opcode, bits<4> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<opcode, OOL, IOL, asmstr, itin> { + bits<5> RA; + bits<5> RS; + bits<5> RB; + bits<6> MBE; + + let Pattern = pattern; + + bit RC = 0; // set by isDOT + + let Inst{6-10} = RS; + let Inst{11-15} = RA; + let Inst{16-20} = RB; + let Inst{21-26} = MBE{4,3,2,1,0,5}; + let Inst{27-30} = xo; + let Inst{31} = RC; +} // E-1 VA-Form |