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author | Chris Lattner <sabre@nondot.org> | 2010-11-15 08:02:41 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-11-15 08:02:41 +0000 |
commit | 17e2c188359769a1df18c42593a94ce0fc2a9a75 (patch) | |
tree | f568eaf30deb008784a483a884852390599a7e13 /lib/Target/PowerPC/PPCInstrInfo.td | |
parent | f3b6e0667996347e8c65e0173352d25d98ff0678 (diff) | |
download | llvm-17e2c188359769a1df18c42593a94ce0fc2a9a75.tar.gz llvm-17e2c188359769a1df18c42593a94ce0fc2a9a75.tar.bz2 llvm-17e2c188359769a1df18c42593a94ce0fc2a9a75.tar.xz |
add support for encoding the lo14 forms used for a few PPC64 addressing
modes. For example, we now get:
ld r3, lo16(_G)(r3) ; encoding: [0xe8,0x63,A,0bAAAAAA00]
; fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119133 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 11f84d0d84..a9b1d87f3f 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -324,6 +324,7 @@ def memrr : Operand<iPTR> { def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits. let PrintMethod = "printMemRegImmShifted"; let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); + let EncoderMethod = "getMemRIXEncoding"; } def tocentry : Operand<iPTR> { let MIOperandInfo = (ops i32imm:$imm); |