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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-10 17:19:15 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-10 17:19:15 +0000 |
| commit | 7c6f90d486911076da01ec0f37af4760fdd7041f (patch) | |
| tree | 78dbf9712290912553f10b65745619d171d7d3a9 /lib/Target/PowerPC/PPCInstrInfo.td | |
| parent | b838f9fe619382b212f6055ad94a74ff36db9219 (diff) | |
| download | llvm-7c6f90d486911076da01ec0f37af4760fdd7041f.tar.gz llvm-7c6f90d486911076da01ec0f37af4760fdd7041f.tar.bz2 llvm-7c6f90d486911076da01ec0f37af4760fdd7041f.tar.xz | |
[PowerPC] Support branch mnemonics with implied CR0
The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified. This patch
adds extra variants of the mnemonics to this effect.
Problem reported by Joerg Sonnenberger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183686 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index c68e3bc520..e5daafe072 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -2168,12 +2168,23 @@ def SRDI : PPCAsmPseudo<"srdi $rA, $rS, $n", multiclass BranchExtendedMnemonic<string name, int bibo> { def : InstAlias<"b"#name#" $cc, $dst", (BCC bibo, crrc:$cc, condbrtarget:$dst)>; + def : InstAlias<"b"#name#" $dst", + (BCC bibo, CR0, condbrtarget:$dst)>; + def : InstAlias<"b"#name#"lr $cc", (BCLR bibo, crrc:$cc)>; + def : InstAlias<"b"#name#"lr", + (BCLR bibo, CR0)>; + def : InstAlias<"b"#name#"ctr $cc", (BCCTR bibo, crrc:$cc)>; + def : InstAlias<"b"#name#"ctr", + (BCCTR bibo, CR0)>; + def : InstAlias<"b"#name#"ctrl $cc", (BCCTRL bibo, crrc:$cc)>; + def : InstAlias<"b"#name#"ctrl", + (BCCTRL bibo, CR0)>; } defm : BranchExtendedMnemonic<"lt", 12>; defm : BranchExtendedMnemonic<"gt", 44>; |