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| author | Hal Finkel <hfinkel@anl.gov> | 2013-09-12 14:40:06 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-09-12 14:40:06 +0000 |
| commit | c0b12dfd0a83081c1ebbb55a89c7a2c1f98f1842 (patch) | |
| tree | e3e267ec506e49515d8be3dd78d79cd3fe3f4b1a /lib/Target/PowerPC/PPCInstrInfo.td | |
| parent | 25d25832d550c1844d27d2034cec1c8d507fa689 (diff) | |
| download | llvm-c0b12dfd0a83081c1ebbb55a89c7a2c1f98f1842.tar.gz llvm-c0b12dfd0a83081c1ebbb55a89c7a2c1f98f1842.tar.bz2 llvm-c0b12dfd0a83081c1ebbb55a89c7a2c1f98f1842.tar.xz | |
Mark PPC MFTB and DST (and friends) as deprecated
Use the new instruction deprecation feature to mark mftb (now replaced with
mfspr) and dst (along with the other Altivec cache control instructions) as
deprecated when targeting cores supporting at least ISA v2.03.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190605 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index e19be00ae2..df618445b3 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1867,7 +1867,7 @@ def MTSPR : XFXForm_1<31, 467, (outs), (ins i32imm:$SPR, gprc:$RT), "mtspr $SPR, $RT", SprMTSPR>; def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), - "mftb $RT, $SPR", SprMFTB>; + "mftb $RT, $SPR", SprMFTB>, Deprecated<DeprecatedMFTB>; let Uses = [CTR] in { def MFCTR : XFXForm_1_ext<31, 339, 9, (outs gprc:$rT), (ins), |