Don't spill LR as a callee saved register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34533 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 11 insertions, 2 deletions

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 1dda53a342..86d17f6fa3 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -439,8 +439,8 @@ bool PPCRegisterInfo::hasFP(const MachineFunction &MF) const {
 /// usesLR - Returns if the link registers (LR) has been used in the function.
 ///
 bool PPCRegisterInfo::usesLR(MachineFunction &MF) const {
-  const bool *PhysRegsUsed = MF.getUsedPhysregs();
-  return PhysRegsUsed[getRARegister()];
+  PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
+  return FI->usesLR();
 }
 
 void PPCRegisterInfo::
@@ -774,6 +774,15 @@ void PPCRegisterInfo::determineFrameLayout(MachineFunction &MF) const {
   MFI->setStackSize(FrameSize);
 }
 
+void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF)
+  const {
+  //  Save and clear the LR state.
+  PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
+  unsigned LR = getRARegister();
+  FI->setUsesLR(MF.isPhysRegUsed(LR));
+  MF.changePhyRegUsed(LR, false);
+}
+
 void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
   MachineBasicBlock::iterator MBBI = MBB.begin();