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author | Dan Gohman <gohman@apple.com> | 2008-10-03 15:45:36 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-10-03 15:45:36 +0000 |
commit | d735b8019b0f297d7c14b55adcd887af24d8e602 (patch) | |
tree | 9019ef6d07a30709c5afbe52903a7cdfd9615cb1 /lib/Target/PowerPC/PPCRegisterInfo.cpp | |
parent | 06a62886fbca6214945958e28b16a82b470f6b2e (diff) | |
download | llvm-d735b8019b0f297d7c14b55adcd887af24d8e602.tar.gz llvm-d735b8019b0f297d7c14b55adcd887af24d8e602.tar.bz2 llvm-d735b8019b0f297d7c14b55adcd887af24d8e602.tar.xz |
Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 014925e1a6..586ad6bcf5 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -629,7 +629,7 @@ void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, // Find out which operand is the frame index. unsigned FIOperandNo = 0; - while (!MI.getOperand(FIOperandNo).isFrameIndex()) { + while (!MI.getOperand(FIOperandNo).isFI()) { ++FIOperandNo; assert(FIOperandNo != MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); @@ -1242,7 +1242,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF, if (UsesTCRet) { int MaxTCRetDelta = FI->getTailCallSPDelta(); MachineOperand &StackAdjust = MBBI->getOperand(1); - assert( StackAdjust.isImmediate() && "Expecting immediate value."); + assert(StackAdjust.isImm() && "Expecting immediate value."); // Adjust stack pointer. int StackAdj = StackAdjust.getImm(); int Delta = StackAdj - MaxTCRetDelta; @@ -1368,7 +1368,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF, } else if (RetOpcode == PPC::TCRETURNri) { MBBI = prior(MBB.end()); MachineOperand &JumpTarget = MBBI->getOperand(0); - assert(JumpTarget.isRegister() && "Expecting register operand."); + assert(JumpTarget.isReg() && "Expecting register operand."); BuildMI(MBB, MBBI, TII.get(PPC::TAILBCTR)); } else if (RetOpcode == PPC::TCRETURNai) { MBBI = prior(MBB.end()); @@ -1382,7 +1382,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF, } else if (RetOpcode == PPC::TCRETURNri8) { MBBI = prior(MBB.end()); MachineOperand &JumpTarget = MBBI->getOperand(0); - assert(JumpTarget.isRegister() && "Expecting register operand."); + assert(JumpTarget.isReg() && "Expecting register operand."); BuildMI(MBB, MBBI, TII.get(PPC::TAILBCTR8)); } else if (RetOpcode == PPC::TCRETURNai8) { MBBI = prior(MBB.end()); |