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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-28 03:38:16 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-28 03:38:16 +0000 |
| commit | d957f957eee12cf26a7160e6015f0a7c2629904f (patch) | |
| tree | 698891f378a4ceea642fe9a8102173b0c6849efd /lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | d01efc737aad480eaaa1316b05b7165ce7c04c96 (diff) | |
| download | llvm-d957f957eee12cf26a7160e6015f0a7c2629904f.tar.gz llvm-d957f957eee12cf26a7160e6015f0a7c2629904f.tar.bz2 llvm-d957f957eee12cf26a7160e6015f0a7c2629904f.tar.xz | |
Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions
There were a few places where kill flags were not being set correctly, and
where 32-bit instruction variants were being used with 64-bit registers. After
r178180, this code was being triggered causing llc to assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178220 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index b48305e9cf..ecfa552751 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -334,7 +334,7 @@ void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II, } addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW)) - .addReg(Reg, getKillRegState(MI.getOperand(1).getImm())), + .addReg(Reg, RegState::Kill), FrameIndex); // Discard the pseudo instruction. @@ -399,7 +399,7 @@ void PPCRegisterInfo::lowerVRSAVESpilling(MachineBasicBlock::iterator II, .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill())); addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::STW)) - .addReg(Reg, getKillRegState(MI.getOperand(1).getImm())), + .addReg(Reg, RegState::Kill), FrameIndex); // Discard the pseudo instruction. |