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| author | Nate Begeman <natebegeman@mac.com> | 2005-12-01 04:48:26 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-12-01 04:48:26 +0000 |
| commit | 5dfc55c304b051a33f4ee30a2e1b4bca85ddb75e (patch) | |
| tree | 80b6496c56887080b3de0d22a027b7c807706195 /lib/Target/PowerPC/PPCRegisterInfo.td | |
| parent | db1cb2b3a15301c000c2bc5a99d5807510b2a456 (diff) | |
| download | llvm-5dfc55c304b051a33f4ee30a2e1b4bca85ddb75e.tar.gz llvm-5dfc55c304b051a33f4ee30a2e1b4bca85ddb75e.tar.bz2 llvm-5dfc55c304b051a33f4ee30a2e1b4bca85ddb75e.tar.xz | |
Cosmetic change, better reflects actual values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24562 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.td | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td index c4ec815c17..d62045d810 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/lib/Target/PowerPC/PPCRegisterInfo.td @@ -28,8 +28,8 @@ class GP8<GPR Alias> : PPCReg<Alias.Name> { } // SPR - One of the 32-bit special-purpose registers -class SPR<bits<5> num, string n> : PPCReg<n> { - field bits<5> Num = num; +class SPR<bits<10> num, string n> : PPCReg<n> { + field bits<10> Num = num; } // FPR - One of the 32 64-bit floating-point registers @@ -126,12 +126,11 @@ def CR4 : CR<4, "cr4">; def CR5 : CR<5, "cr5">; def CR6 : CR<6, "cr6">; def CR7 : CR<7, "cr7">; // Link register -// FIXME: encode actual spr numbers here -def LR : SPR<2, "lr">; +def LR : SPR<8, "lr">; // Count register -def CTR : SPR<3, "ctr">; +def CTR : SPR<9, "ctr">; // VRsave register -def VRSAVE: SPR<4, "VRsave">; +def VRSAVE: SPR<256, "VRsave">; /// Register classes // Allocate volatiles first |