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| author | Hal Finkel <hfinkel@anl.gov> | 2013-09-22 00:08:14 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-09-22 00:08:14 +0000 |
| commit | 50019d8f7e1af96b85098ba501acbb9845682e4a (patch) | |
| tree | c7e01ae2061ce48d9f9cde0e44da55416fe23b08 /lib/Target/PowerPC | |
| parent | 20b5879e0ec5c926c3b636ad36d5b6cfb278f736 (diff) | |
| download | llvm-50019d8f7e1af96b85098ba501acbb9845682e4a.tar.gz llvm-50019d8f7e1af96b85098ba501acbb9845682e4a.tar.bz2 llvm-50019d8f7e1af96b85098ba501acbb9845682e4a.tar.xz | |
Correct the pre-increment load latencies in the PPC A2 itinerary
Pre-increment loads are microcoded on the A2, and the address increment occurs
only after the load completes. As a result, the latency of the GPR address
update is an additional 2 cycles on top of the load latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191156 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
| -rw-r--r-- | lib/Target/PowerPC/PPCScheduleA2.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCScheduleA2.td b/lib/Target/PowerPC/PPCScheduleA2.td index 2e41edf899..1612cd2a0b 100644 --- a/lib/Target/PowerPC/PPCScheduleA2.td +++ b/lib/Target/PowerPC/PPCScheduleA2.td @@ -70,7 +70,7 @@ def PPCA2Itineraries : ProcessorItineraries< InstrItinData<LdStLoad , [InstrStage<1, [XU]>], [6, 1, 1]>, InstrItinData<LdStLoadUpd , [InstrStage<1, [XU]>], - [6, 2, 1, 1]>, + [6, 8, 1, 1]>, InstrItinData<LdStLDU , [InstrStage<1, [XU]>], [6, 1, 1]>, InstrItinData<LdStStore , [InstrStage<1, [XU]>], @@ -86,11 +86,11 @@ def PPCA2Itineraries : ProcessorItineraries< InstrItinData<LdStLFD , [InstrStage<1, [XU]>], [7, 1, 1]>, InstrItinData<LdStLFDU , [InstrStage<1, [XU]>], - [7, 2, 1, 1]>, + [7, 9, 1, 1]>, InstrItinData<LdStLHA , [InstrStage<1, [XU]>], [6, 1, 1]>, InstrItinData<LdStLHAU , [InstrStage<1, [XU]>], - [6, 2, 1, 1]>, + [6, 8, 1, 1]>, InstrItinData<LdStLWARX , [InstrStage<1, [XU]>], [82, 1, 1]>, // L2 latency InstrItinData<LdStSTD , [InstrStage<1, [XU]>], |