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| author | Adam Nemet <anemet@apple.com> | 2014-05-20 17:20:34 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2014-05-20 17:20:34 +0000 |
| commit | c9b12d06ef1ee950ed2125f6a810854e79e18929 (patch) | |
| tree | b1c4fb7613453c06b7b261c4773c7de71398d2d1 /lib/Target/PowerPC | |
| parent | 68c7a1cb98399c770af6dc103bec45b1b7ca3c29 (diff) | |
| download | llvm-c9b12d06ef1ee950ed2125f6a810854e79e18929.tar.gz llvm-c9b12d06ef1ee950ed2125f6a810854e79e18929.tar.bz2 llvm-c9b12d06ef1ee950ed2125f6a810854e79e18929.tar.xz | |
[PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16Immediate
The SplitIndexingFromLoad changes exposed a latent isel bug in the PowerPC64
backend. We matched an immediate offset with STWX8 even though it only
supports register offset.
The culprit is the complex-pattern predicate, SelectAddrIdx, which decides
that if the offset is not ISD::Constant it must be a register.
Many thanks to Bill Schmidt for testing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209219 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 04bd43547c..214c869206 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1137,7 +1137,7 @@ SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) { /// sign extension from a 16-bit value. If so, this returns true and the /// immediate. static bool isIntS16Immediate(SDNode *N, short &Imm) { - if (N->getOpcode() != ISD::Constant) + if (!isa<ConstantSDNode>(N)) return false; Imm = (short)cast<ConstantSDNode>(N)->getZExtValue(); |