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| author | Chandler Carruth <chandlerc@gmail.com> | 2013-01-02 10:22:59 +0000 |
|---|---|---|
| committer | Chandler Carruth <chandlerc@gmail.com> | 2013-01-02 10:22:59 +0000 |
| commit | 58a2cbef4aac9ee7d530dfb690c78d6fc11a2371 (patch) | |
| tree | 8050f77ea61ea691d88fdff5fafff9b08ddd2d23 /lib/Target/R600/MCTargetDesc | |
| parent | fe4c10caecc31dcb7a630091e1250e284ed528d5 (diff) | |
| download | llvm-58a2cbef4aac9ee7d530dfb690c78d6fc11a2371.tar.gz llvm-58a2cbef4aac9ee7d530dfb690c78d6fc11a2371.tar.bz2 llvm-58a2cbef4aac9ee7d530dfb690c78d6fc11a2371.tar.xz | |
Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.
Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/MCTargetDesc')
| -rw-r--r-- | lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp | 2 |
3 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp b/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp index 6a62856e10..072ee49b63 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp +++ b/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp @@ -15,12 +15,12 @@ #include "AMDGPUMCTargetDesc.h" #include "AMDGPUMCAsmInfo.h" #include "InstPrinter/AMDGPUInstPrinter.h" -#include "llvm/MC/MachineLocation.h" #include "llvm/MC/MCCodeGenInfo.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MachineLocation.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/TargetRegistry.h" diff --git a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp index dc91924c73..36deae9c0a 100644 --- a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp +++ b/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp @@ -19,8 +19,8 @@ //===----------------------------------------------------------------------===// #include "R600Defines.h" -#include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "MCTargetDesc/AMDGPUMCCodeEmitter.h" +#include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCInst.h" @@ -28,7 +28,6 @@ #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/Support/raw_ostream.h" - #include <stdio.h> #define SRC_BYTE_COUNT 11 diff --git a/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp b/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp index c47dc995c7..b4bdb25289 100644 --- a/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp @@ -17,11 +17,11 @@ #include "MCTargetDesc/AMDGPUMCCodeEmitter.h" #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCFixup.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/MC/MCFixup.h" #include "llvm/Support/raw_ostream.h" #define VGPR_BIT(src_idx) (1ULL << (9 * src_idx - 1)) |