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author | Tom Stellard <thomas.stellard@amd.com> | 2013-07-23 01:48:42 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-07-23 01:48:42 +0000 |
commit | 3f5d63b95618860ca69eeab9be37cf26a253150e (patch) | |
tree | 2b3d4558aa470299e002429e1d7f70bf0a506d2c /lib/Target/R600/R600Instructions.td | |
parent | eb643b9b37cf2b15249f43aa21ed25a71e71862c (diff) | |
download | llvm-3f5d63b95618860ca69eeab9be37cf26a253150e.tar.gz llvm-3f5d63b95618860ca69eeab9be37cf26a253150e.tar.bz2 llvm-3f5d63b95618860ca69eeab9be37cf26a253150e.tar.xz |
R600: Add support for 24-bit MUL instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186922 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600Instructions.td')
-rw-r--r-- | lib/Target/R600/R600Instructions.td | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td index 9aeebc9436..56015ea80a 100644 --- a/lib/Target/R600/R600Instructions.td +++ b/lib/Target/R600/R600Instructions.td @@ -1473,6 +1473,9 @@ let Predicates = [isEGorCayman] in { def CNDGE_eg : CNDGE_Common<0x1B>; def MUL_LIT_eg : MUL_LIT_Common<0x1F>; def LOG_CLAMPED_eg : LOG_CLAMPED_Common<0x82>; + def MUL_UINT24_eg : R600_2OP <0xB5, "MUL_UINT24", + [(set i32:$dst, (mul U24:$src0, U24:$src1))], VecALU + >; def DOT4_eg : DOT4_Common<0xBE>; defm CUBE_eg : CUBE_Common<0xC0>; @@ -1703,6 +1706,10 @@ defm R600_ : RegisterLoadStore <R600_Reg32, FRAMEri, ADDRIndirect>; let Predicates = [isCayman] in { +def MUL_INT24_cm : R600_2OP <0x5B, "MUL_INT24", + [(set i32:$dst, (mul I24:$src0, I24:$src1))], VecALU +>; + let isVector = 1 in { def RECIP_IEEE_cm : RECIP_IEEE_Common<0x86>; |