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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-12-10 21:37:42 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-12-10 21:37:42 +0000 |
| commit | 17427fa9bb0d4dad96270542184d2a28d5626c22 (patch) | |
| tree | 2ca66393dfd70e7b7d764a22072c8784bdc31d24 /lib/Target/R600/R600OptimizeVectorRegisters.cpp | |
| parent | b59d46efa521801a3d42fc5f53fedf3e81b070ce (diff) | |
| download | llvm-17427fa9bb0d4dad96270542184d2a28d5626c22.tar.gz llvm-17427fa9bb0d4dad96270542184d2a28d5626c22.tar.bz2 llvm-17427fa9bb0d4dad96270542184d2a28d5626c22.tar.xz | |
Use llvm_unreachable instead of assert(0)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196971 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600OptimizeVectorRegisters.cpp')
| -rw-r--r-- | lib/Target/R600/R600OptimizeVectorRegisters.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/R600/R600OptimizeVectorRegisters.cpp b/lib/Target/R600/R600OptimizeVectorRegisters.cpp index cf719c0b9f..8e0946ed25 100644 --- a/lib/Target/R600/R600OptimizeVectorRegisters.cpp +++ b/lib/Target/R600/R600OptimizeVectorRegisters.cpp @@ -63,7 +63,7 @@ public: DenseMap<unsigned, unsigned> RegToChan; std::vector<unsigned> UndefReg; RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { - assert (MI->getOpcode() == AMDGPU::REG_SEQUENCE); + assert(MI->getOpcode() == AMDGPU::REG_SEQUENCE); for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { MachineOperand &MO = Instr->getOperand(i); unsigned Chan = Instr->getOperand(i + 1).getImm(); |