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author | Tom Stellard <thomas.stellard@amd.com> | 2014-06-17 19:34:46 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-06-17 19:34:46 +0000 |
commit | 540fe7f20ee5a718abd2d5f1fff5092485a1dbc6 (patch) | |
tree | 44ab3f37bab94b0f85d705965d1c5875a53822db /lib/Target/R600/SIInstrFormats.td | |
parent | 4a5916aca998a104f8bc0403f4dc566af6483023 (diff) | |
download | llvm-540fe7f20ee5a718abd2d5f1fff5092485a1dbc6.tar.gz llvm-540fe7f20ee5a718abd2d5f1fff5092485a1dbc6.tar.bz2 llvm-540fe7f20ee5a718abd2d5f1fff5092485a1dbc6.tar.xz |
R600/SI: Make sure target flags are set on pseudo VOP3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211120 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIInstrFormats.td')
-rw-r--r-- | lib/Target/R600/SIInstrFormats.td | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/R600/SIInstrFormats.td b/lib/Target/R600/SIInstrFormats.td index 168eff25bb..7cae9fc0d0 100644 --- a/lib/Target/R600/SIInstrFormats.td +++ b/lib/Target/R600/SIInstrFormats.td @@ -51,6 +51,16 @@ class Enc64 <dag outs, dag ins, string asm, list<dag> pattern> : let Size = 8; } +class VOP3Common <dag outs, dag ins, string asm, list<dag> pattern> : + Enc64 <outs, ins, asm, pattern> { + + let mayLoad = 0; + let mayStore = 0; + let hasSideEffects = 0; + let UseNamedOperandTable = 1; + let VOP3 = 1; +} + //===----------------------------------------------------------------------===// // Scalar operations //===----------------------------------------------------------------------===// @@ -207,7 +217,7 @@ class VOP2 <bits<6> op, dag outs, dag ins, string asm, list<dag> pattern> : } class VOP3 <bits<9> op, dag outs, dag ins, string asm, list<dag> pattern> : - Enc64 <outs, ins, asm, pattern> { + VOP3Common <outs, ins, asm, pattern> { bits<8> dst; bits<2> src0_modifiers; @@ -233,16 +243,11 @@ class VOP3 <bits<9> op, dag outs, dag ins, string asm, list<dag> pattern> : let Inst{61} = src0_modifiers{0}; let Inst{62} = src1_modifiers{0}; let Inst{63} = src2_modifiers{0}; - - let mayLoad = 0; - let mayStore = 0; - let hasSideEffects = 0; - let UseNamedOperandTable = 1; - let VOP3 = 1; + } class VOP3b <bits<9> op, dag outs, dag ins, string asm, list<dag> pattern> : - Enc64 <outs, ins, asm, pattern> { + VOP3Common <outs, ins, asm, pattern> { bits<8> dst; bits<2> src0_modifiers; @@ -266,11 +271,6 @@ class VOP3b <bits<9> op, dag outs, dag ins, string asm, list<dag> pattern> : let Inst{62} = src1_modifiers{0}; let Inst{63} = src2_modifiers{0}; - let mayLoad = 0; - let mayStore = 0; - let hasSideEffects = 0; - let UseNamedOperandTable = 1; - let VOP3 = 1; } class VOPC <bits<8> op, dag ins, string asm, list<dag> pattern> : |