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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-02-07 17:02:13 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-02-07 17:02:13 +0000 |
| commit | 914e47bb0c5d01e4c129b8753ef315517aae8f2f (patch) | |
| tree | 5eac6d5b2f75987497e426fdda28d1e343048ed0 /lib/Target/R600/SIIntrinsics.td | |
| parent | 36ba9091843bd1205fe3499ba4b55bbedc6583c9 (diff) | |
| download | llvm-914e47bb0c5d01e4c129b8753ef315517aae8f2f.tar.gz llvm-914e47bb0c5d01e4c129b8753ef315517aae8f2f.tar.bz2 llvm-914e47bb0c5d01e4c129b8753ef315517aae8f2f.tar.xz | |
R600/SI: Make sample intrinsic address parameter type overloaded.
Handle vectors of 1 to 16 integers.
Change the intrinsic names to prevent the wrong one from being selected at
runtime due to the overloading.
Patch By: Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174633 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIIntrinsics.td')
| -rw-r--r-- | lib/Target/R600/SIIntrinsics.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/R600/SIIntrinsics.td b/lib/Target/R600/SIIntrinsics.td index 43931445ee..611b9c41d9 100644 --- a/lib/Target/R600/SIIntrinsics.td +++ b/lib/Target/R600/SIIntrinsics.td @@ -22,11 +22,11 @@ let TargetPrefix = "SI", isTarget = 1 in { def int_SI_vs_load_input : Intrinsic <[llvm_v4f32_ty], [llvm_v4i32_ty, llvm_i16_ty, llvm_i32_ty], [IntrReadMem]> ; def int_SI_wqm : Intrinsic <[], [], []>; - class Sample : Intrinsic <[llvm_v4f32_ty], [llvm_i32_ty, llvm_v4f32_ty, llvm_v8i32_ty, llvm_v4i32_ty, llvm_i32_ty], [IntrReadMem]>; + class Sample : Intrinsic <[llvm_v4f32_ty], [llvm_i32_ty, llvm_anyvector_ty, llvm_v8i32_ty, llvm_v4i32_ty, llvm_i32_ty], [IntrReadMem]>; def int_SI_sample : Sample; - def int_SI_sample_bias : Sample; - def int_SI_sample_lod : Sample; + def int_SI_sampleb : Sample; + def int_SI_samplel : Sample; /* Interpolation Intrinsics */ |