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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:24 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:24 +0000 |
| commit | 636298ba64fd07d4ddcae6005e7fc1db43eb5335 (patch) | |
| tree | a65b1daaa89c1589cf37ebe806c871b8e5b3b705 /lib/Target/R600/SIRegisterInfo.cpp | |
| parent | df4626ef15ba0eb5f571a3ee6314e5c388258927 (diff) | |
| download | llvm-636298ba64fd07d4ddcae6005e7fc1db43eb5335.tar.gz llvm-636298ba64fd07d4ddcae6005e7fc1db43eb5335.tar.bz2 llvm-636298ba64fd07d4ddcae6005e7fc1db43eb5335.tar.xz | |
R600/SI: Choose the correct MOV instruction for copying immediates
The instruction selector will now try to infer the destination register
so it can decided whether to use V_MOV_B32 or S_MOV_B32 when copying
immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188426 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/R600/SIRegisterInfo.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/R600/SIRegisterInfo.cpp b/lib/Target/R600/SIRegisterInfo.cpp index 50fd4c7ed5..5d12564fe8 100644 --- a/lib/Target/R600/SIRegisterInfo.cpp +++ b/lib/Target/R600/SIRegisterInfo.cpp @@ -70,3 +70,14 @@ const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const { } return NULL; } + +bool SIRegisterInfo::isSGPRClass(const TargetRegisterClass *RC) const { + if (!RC) { + return false; + } + return RC == &AMDGPU::SReg_32RegClass || + RC == &AMDGPU::SReg_64RegClass || + RC == &AMDGPU::SReg_128RegClass || + RC == &AMDGPU::SReg_256RegClass || + RC == &AMDGPU::SReg_512RegClass; +} |