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authorBenjamin Kramer <benny.kra@googlemail.com>2011-02-02 15:56:22 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2011-02-02 15:56:22 +0000
commit56442dfdcf7b07c04b585de5205b9427b1739895 (patch)
tree93e69afd94be2799ef289cd14f0f02e73e5fb05b /lib/Target/README.txt
parentff0c5014b2127b16815121d9e723dc85bd164a79 (diff)
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SimplifyCFG: Turn switches into sub+icmp+branch if possible.
This makes the job of the later optzn passes easier, allowing the vast amount of icmp transforms to chew on it. We transform 840 switches in gcc.c, leading to a 16k byte shrink of the resulting binary on i386-linux. The testcase from README.txt now compiles into decl %edi cmpl $3, %edi sbbl %eax, %eax andl $1, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124724 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/README.txt')
-rw-r--r--lib/Target/README.txt48
1 files changed, 0 insertions, 48 deletions
diff --git a/lib/Target/README.txt b/lib/Target/README.txt
index b3bc749856..c0a2b760de 100644
--- a/lib/Target/README.txt
+++ b/lib/Target/README.txt
@@ -2274,51 +2274,3 @@ llc time when it gets inlined, because we can use smaller transfers. This also
avoids partial register stalls in some important cases.
//===---------------------------------------------------------------------===//
-
-With PR8575 we're now generating better code for:
-
-static _Bool foo(int x) { return x == 1; }
-static _Bool bar(int x) { return x == 2; }
-static _Bool baz(int x) { return x == 3; }
-
-_Bool quux(int x) {
- return foo(x) || bar(x) || baz(x);
-}
-
-$ clang t.c -S -o - -O3 -mkernel -fomit-frame-pointer
-_quux: ## @quux
-## BB#0: ## %entry
- decl %edi
- cmpl $3, %edi
- movb $1, %al
- jb LBB0_2
-## BB#1: ## %lor.rhs
- xorb %al, %al
-LBB0_2: ## %lor.end
- movzbl %al, %eax
- andl $1, %eax
- ret
-
-But this should use a "setcc" instead of materializing a 0/1 value
-the hard way. This looks like #1: simplifycfg should transform the
-switch into a sub+icmp+branch, and an instcombine hack to replace
-the PHI with a zext of the branch condition. Here's the IR today:
-
-define zeroext i1 @quux(i32 %x) nounwind readnone ssp noredzone {
-entry:
- switch i32 %x, label %lor.rhs [
- i32 1, label %lor.end
- i32 2, label %lor.end
- i32 3, label %lor.end
- ]
-
-lor.rhs: ; preds = %entry
- br label %lor.end
-
-lor.end: ; preds = %lor.rhs, %entry, %entry, %entry
- %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
- ret i1 %0
-}
-
-//===---------------------------------------------------------------------===//
-