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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-10 01:48:17 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-10 01:48:17 +0000 |
commit | 8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1 (patch) | |
tree | 862526347d40b77a85794013e2ef6dd533597188 /lib/Target/Sparc/DelaySlotFiller.cpp | |
parent | 0f09c9f5ac4017f4accda3691832e71ba7158c2c (diff) | |
download | llvm-8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1.tar.gz llvm-8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1.tar.bz2 llvm-8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1.tar.xz |
[Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198909 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/DelaySlotFiller.cpp')
-rw-r--r-- | lib/Target/Sparc/DelaySlotFiller.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp index 9a0466aa69..b2d8b3fedb 100644 --- a/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/lib/Target/Sparc/DelaySlotFiller.cpp @@ -278,19 +278,19 @@ void Filler::insertCallDefsUses(MachineBasicBlock::iterator MI, switch(MI->getOpcode()) { default: llvm_unreachable("Unknown opcode."); case SP::CALL: break; - case SP::JMPLrr: - case SP::JMPLri: + case SP::CALLrr: + case SP::CALLri: assert(MI->getNumOperands() >= 2); const MachineOperand &Reg = MI->getOperand(0); - assert(Reg.isReg() && "JMPL first operand is not a register."); - assert(Reg.isUse() && "JMPL first operand is not a use."); + assert(Reg.isReg() && "CALL first operand is not a register."); + assert(Reg.isUse() && "CALL first operand is not a use."); RegUses.insert(Reg.getReg()); const MachineOperand &RegOrImm = MI->getOperand(1); if (RegOrImm.isImm()) break; - assert(RegOrImm.isReg() && "JMPLrr second operand is not a register."); - assert(RegOrImm.isUse() && "JMPLrr second operand is not a use."); + assert(RegOrImm.isReg() && "CALLrr second operand is not a register."); + assert(RegOrImm.isUse() && "CALLrr second operand is not a use."); RegUses.insert(RegOrImm.getReg()); break; } @@ -353,8 +353,8 @@ bool Filler::needsUnimp(MachineBasicBlock::iterator I, unsigned &StructSize) switch (I->getOpcode()) { default: llvm_unreachable("Unknown call opcode."); case SP::CALL: structSizeOpNum = 1; break; - case SP::JMPLrr: - case SP::JMPLri: structSizeOpNum = 2; break; + case SP::CALLrr: + case SP::CALLri: structSizeOpNum = 2; break; case SP::TLS_CALL: return false; } |