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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-10 01:48:17 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-10 01:48:17 +0000 |
commit | 8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1 (patch) | |
tree | 862526347d40b77a85794013e2ef6dd533597188 /lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp | |
parent | 0f09c9f5ac4017f4accda3691832e71ba7158c2c (diff) | |
download | llvm-8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1.tar.gz llvm-8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1.tar.bz2 llvm-8ce28c812bdd11f5bb8d35d84b3ab97a4ad9ffd1.tar.xz |
[Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198909 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp')
-rw-r--r-- | lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp index 5e39bd6cb1..0228e61cf9 100644 --- a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp +++ b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp @@ -22,6 +22,7 @@ using namespace llvm; #define GET_INSTRUCTION_NAME +#define PRINT_ALIAS_INSTR #include "SparcGenAsmWriter.inc" void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const @@ -32,10 +33,34 @@ void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const void SparcInstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { - printInstruction(MI, O); + if (!printAliasInstr(MI, O) && !printSparcAliasInstr(MI, O)) + printInstruction(MI, O); printAnnotation(O, Annot); } +bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O) +{ + switch (MI->getOpcode()) { + default: return false; + case SP::JMPLrr: + case SP::JMPLri: { + if (MI->getNumOperands() != 3) + return false; + if (!MI->getOperand(0).isReg()) + return false; + switch (MI->getOperand(0).getReg()) { + default: return false; + case SP::G0: // jmp $addr + O << "\tjmp "; printMemOperand(MI, 1, O); + return true; + case SP::O7: // call $addr + O << "\tcall "; printMemOperand(MI, 1, O); + return true; + } + } + } +} + void SparcInstPrinter::printOperand(const MCInst *MI, int opNum, raw_ostream &O) { |