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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-12-25 23:43:39 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-12-25 23:43:39 +0000 |
commit | dec96eaecf2a2e2a2ef43bfa75b7d5ffb5184782 (patch) | |
tree | 8488826614162d30f8436ef16c5ffb19c6573f78 /lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp | |
parent | ca523f4f3d35c59869525a0c2bf391d7aa8760c4 (diff) | |
download | llvm-dec96eaecf2a2e2a2ef43bfa75b7d5ffb5184782.tar.gz llvm-dec96eaecf2a2e2a2ef43bfa75b7d5ffb5184782.tar.bz2 llvm-dec96eaecf2a2e2a2ef43bfa75b7d5ffb5184782.tar.xz |
[Sparc] Add MCInstPrinter implementation for SPARC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198028 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp')
-rw-r--r-- | lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp new file mode 100644 index 0000000000..1c5a334f24 --- /dev/null +++ b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp @@ -0,0 +1,95 @@ +//===-- SparcInstPrinter.cpp - Convert Sparc MCInst to assembly syntax -----==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This class prints an Sparc MCInst to a .s file. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "asm-printer" +#include "SparcInstPrinter.h" + +#include "Sparc.h" +#include "MCTargetDesc/SparcBaseInfo.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm; + +#define GET_INSTRUCTION_NAME +// Uncomment the following line once we are ready to use MCAsmWriter. +//#include "SparcGenAsmWriter.inc" + +void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const +{ + OS << '%' << StringRef(getRegisterName(RegNo)).lower(); +} + +void SparcInstPrinter::printInst(const MCInst *MI, raw_ostream &O, + StringRef Annot) +{ + printInstruction(MI, O); + printAnnotation(O, Annot); +} + +void SparcInstPrinter::printOperand(const MCInst *MI, int opNum, + raw_ostream &O) +{ + const MCOperand &MO = MI->getOperand (opNum); + + if (MO.isReg()) { + printRegName(O, MO.getReg()); + return ; + } + + if (MO.isImm()) { + O << (int)MO.getImm(); + return; + } + + assert(MO.isExpr() && "Unknown operand kind in printOperand"); + MO.getExpr()->print(O); +} + +void SparcInstPrinter::printMemOperand(const MCInst *MI, int opNum, + raw_ostream &O, const char *Modifier) +{ + printOperand(MI, opNum, O); + + // If this is an ADD operand, emit it like normal operands. + if (Modifier && !strcmp(Modifier, "arith")) { + O << ", "; + printOperand(MI, opNum+1, O); + return; + } + const MCOperand &MO = MI->getOperand(opNum+1); + + if (MO.isReg() && MO.getReg() == SP::G0) + return; // don't print "+%g0" + if (MO.isImm() && MO.getImm() == 0) + return; // don't print "+0" + + O << "+"; + + printOperand(MI, opNum+1, O); +} + +void SparcInstPrinter::printCCOperand(const MCInst *MI, int opNum, + raw_ostream &O) +{ + int CC = (int)MI->getOperand(opNum).getImm(); + O << SPARCCondCodeToString((SPCC::CondCodes)CC); +} + +bool SparcInstPrinter::printGetPCX(const MCInst *MI, unsigned opNum, + raw_ostream &O) +{ + assert(0 && "FIXME: Implement SparcInstPrinter::printGetPCX."); + return true; +} |