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| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 22:55:53 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 22:55:53 +0000 |
| commit | 75bff895e450f7b4fd17196cbcdac0a960a4e658 (patch) | |
| tree | 65ac34f2a59ed6f03d92fd5e32748b618684e9fd /lib/Target/Sparc/SparcInstrInfo.td | |
| parent | 361542afd63efd865147a4fe7b0dad005c683517 (diff) | |
| download | llvm-75bff895e450f7b4fd17196cbcdac0a960a4e658.tar.gz llvm-75bff895e450f7b4fd17196cbcdac0a960a4e658.tar.bz2 llvm-75bff895e450f7b4fd17196cbcdac0a960a4e658.tar.xz | |
[Sparc] Add return/rett instruction to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202666 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcInstrInfo.td')
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 11e3c7467d..9de8f3790d 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -406,6 +406,14 @@ let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1, "jmp %i7+$val", []>; } +let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, + isBarrier = 1, rd = 0, DecoderMethod = "DecodeReturn" in { + def RETTrr : F3_1<2, 0b111001, (outs), (ins MEMrr:$addr), + "rett $addr", []>; + def RETTri : F3_2<2, 0b111001, (outs), (ins MEMri:$addr), + "rett $addr", []>; +} + // Section B.1 - Load Integer Instructions, p. 90 let DecoderMethod = "DecodeLoadInt" in { defm LDSB : Load<"ldsb", 0b001001, sextloadi8, IntRegs, i32>; |