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authorVenkatraman Govindaraju <venkatra@cs.wisc.edu>2013-10-06 07:06:44 +0000
committerVenkatraman Govindaraju <venkatra@cs.wisc.edu>2013-10-06 07:06:44 +0000
commit79c5e0c5ca85454da568dfafc0bedb84af6c2a68 (patch)
tree8f3d2141dae0d3d8512737f3ce68057175f20d55 /lib/Target/Sparc/SparcInstrInfo.td
parenta6269ee5fbb6e1237648a47d31f96ba3b4a1bb54 (diff)
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[Sparc] Do not emit nop after fcmp* instruction with V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192056 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcInstrInfo.td')
-rw-r--r--lib/Target/Sparc/SparcInstrInfo.td12
1 files changed, 7 insertions, 5 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index 470de70b45..e6a9cf53d1 100644
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -807,20 +807,22 @@ def FDIVQ : F3_3<2, 0b110100, 0b001001111,
// Floating-point Compare Instructions, p. 148
// Note: the 2nd template arg is different for these guys.
// Note 2: the result of a FCMP is not available until the 2nd cycle
-// after the instr is retired, but there is no interlock. This behavior
-// is modelled with a forced noop after the instruction.
+// after the instr is retired, but there is no interlock in Sparc V8.
+// This behavior is modeled with a forced noop after the instruction in
+// DelaySlotFiller.
+
let Defs = [FCC] in {
def FCMPS : F3_3c<2, 0b110101, 0b001010001,
(outs), (ins FPRegs:$src1, FPRegs:$src2),
- "fcmps $src1, $src2\n\tnop",
+ "fcmps $src1, $src2",
[(SPcmpfcc f32:$src1, f32:$src2)]>;
def FCMPD : F3_3c<2, 0b110101, 0b001010010,
(outs), (ins DFPRegs:$src1, DFPRegs:$src2),
- "fcmpd $src1, $src2\n\tnop",
+ "fcmpd $src1, $src2",
[(SPcmpfcc f64:$src1, f64:$src2)]>;
def FCMPQ : F3_3c<2, 0b110101, 0b001010011,
(outs), (ins QFPRegs:$src1, QFPRegs:$src2),
- "fcmpq $src1, $src2\n\tnop",
+ "fcmpq $src1, $src2",
[(SPcmpfcc f128:$src1, f128:$src2)]>,
Requires<[HasHardQuad]>;
}