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authorEvan Cheng <evan.cheng@apple.com>2007-02-23 01:10:04 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-02-23 01:10:04 +0000
commit0fa1b6d1b1ce5437c30585baddcba20e691d31e0 (patch)
treeb2e49a633c734babd1a779afbcc71ac48c3e250c /lib/Target/Sparc/SparcRegisterInfo.cpp
parentead75905813e175898677cb8c4e4cc919ad2782d (diff)
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By default, spills kills the register being stored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34515 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcRegisterInfo.cpp')
-rw-r--r--lib/Target/Sparc/SparcRegisterInfo.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index 4ea31e2e8e..f7feb9cd50 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -37,13 +37,13 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
if (RC == SP::IntRegsRegisterClass)
BuildMI(MBB, I, TII.get(SP::STri)).addFrameIndex(FI).addImm(0)
- .addReg(SrcReg);
+ .addReg(SrcReg, false, false, true);
else if (RC == SP::FPRegsRegisterClass)
BuildMI(MBB, I, TII.get(SP::STFri)).addFrameIndex(FI).addImm(0)
- .addReg(SrcReg);
+ .addReg(SrcReg, false, false, true);
else if (RC == SP::DFPRegsRegisterClass)
BuildMI(MBB, I, TII.get(SP::STDFri)).addFrameIndex(FI).addImm(0)
- .addReg(SrcReg);
+ .addReg(SrcReg, false, false, true);
else
assert(0 && "Can't store this register to stack slot");
}