diff options
| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 19:56:19 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 19:56:19 +0000 |
| commit | 833687be0e2c3f38086abcaf1b9fb46d972c97b0 (patch) | |
| tree | 134f80fb5fa784823e40832692164b69772092de /lib/Target/Sparc | |
| parent | cf06410678a40c09c4ff311cebfe202fa55e3b46 (diff) | |
| download | llvm-833687be0e2c3f38086abcaf1b9fb46d972c97b0.tar.gz llvm-833687be0e2c3f38086abcaf1b9fb46d972c97b0.tar.bz2 llvm-833687be0e2c3f38086abcaf1b9fb46d972c97b0.tar.xz | |
[Sparc] Add fcmpe* instructions to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202661 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
| -rw-r--r-- | lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp | 14 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcInstrAliases.td | 7 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 13 |
3 files changed, 28 insertions, 6 deletions
diff --git a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp index 7a8a66341c..045c99087a 100644 --- a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp +++ b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp @@ -69,9 +69,8 @@ bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O) return true; } } - case SP::V9FCMPS: - case SP::V9FCMPD: - case SP::V9FCMPQ: { + case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ: + case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: { if (isV9() || (MI->getNumOperands() != 3) || (!MI->getOperand(0).isReg()) @@ -80,9 +79,12 @@ bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O) // if V8, skip printing %fcc0. switch(MI->getOpcode()) { default: - case SP::V9FCMPS: O << "\tfcmps "; break; - case SP::V9FCMPD: O << "\tfcmpd "; break; - case SP::V9FCMPQ: O << "\tfcmpq "; break; + case SP::V9FCMPS: O << "\tfcmps "; break; + case SP::V9FCMPD: O << "\tfcmpd "; break; + case SP::V9FCMPQ: O << "\tfcmpq "; break; + case SP::V9FCMPES: O << "\tfcmpes "; break; + case SP::V9FCMPED: O << "\tfcmped "; break; + case SP::V9FCMPEQ: O << "\tfcmpeq "; break; } printOperand(MI, 1, O); O << ", "; diff --git a/lib/Target/Sparc/SparcInstrAliases.td b/lib/Target/Sparc/SparcInstrAliases.td index 0ab93706df..a77f248e43 100644 --- a/lib/Target/Sparc/SparcInstrAliases.td +++ b/lib/Target/Sparc/SparcInstrAliases.td @@ -260,3 +260,10 @@ def : InstAlias<"fcmps $rs1, $rs2", (V9FCMPS FCC0, FPRegs:$rs1, FPRegs:$rs2)>; def : InstAlias<"fcmpd $rs1, $rs2", (V9FCMPD FCC0, DFPRegs:$rs1, DFPRegs:$rs2)>; def : InstAlias<"fcmpq $rs1, $rs2", (V9FCMPQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2)>, Requires<[HasHardQuad]>; + +def : InstAlias<"fcmpes $rs1, $rs2", (V9FCMPES FCC0, FPRegs:$rs1, FPRegs:$rs2)>; +def : InstAlias<"fcmped $rs1, $rs2", (V9FCMPED FCC0, DFPRegs:$rs1, + DFPRegs:$rs2)>; +def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1, + QFPRegs:$rs2)>, + Requires<[HasHardQuad]>; diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index ceda1504cc..e8934deeba 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -1040,6 +1040,19 @@ def V9FCMPQ : F3_3c<2, 0b110101, 0b001010011, "fcmpq $rd, $rs1, $rs2", []>, Requires<[HasHardQuad]>; +let hasSideEffects = 1 in { + def V9FCMPES : F3_3c<2, 0b110101, 0b001010101, + (outs FCCRegs:$rd), (ins FPRegs:$rs1, FPRegs:$rs2), + "fcmpes $rd, $rs1, $rs2", []>; + def V9FCMPED : F3_3c<2, 0b110101, 0b001010110, + (outs FCCRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), + "fcmped $rd, $rs1, $rs2", []>; + def V9FCMPEQ : F3_3c<2, 0b110101, 0b001010111, + (outs FCCRegs:$rd), (ins QFPRegs:$rs1, QFPRegs:$rs2), + "fcmpeq $rd, $rs1, $rs2", []>, + Requires<[HasHardQuad]>; +} + // Floating point conditional move instrucitons with %fcc0-%fcc3. let Predicates = [HasV9] in { let Constraints = "$f = $rd", intcc = 0 in { |