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authorAnton Korobeynikov <asl@math.spbu.ru>2009-07-16 14:04:01 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-07-16 14:04:01 +0000
commited00212f4359190df95c9970ac5b1e2fd2bda384 (patch)
treeb88112b032025a7d29f78c573b1cdf0bf56b2d6a /lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
parent3166a9ac5c81621bb7f58f8cd4311694af26fa29 (diff)
downloadllvm-ed00212f4359190df95c9970ac5b1e2fd2bda384.tar.gz
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Implement asmprinting for odd-even regpairs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75974 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp')
-rw-r--r--lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp15
1 files changed, 13 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
index 8306e26b98..f98d4ed715 100644
--- a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
+++ b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
@@ -181,11 +181,22 @@ void SystemZAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
const char* Modifier) {
const MachineOperand &MO = MI->getOperand(OpNum);
switch (MO.getType()) {
- case MachineOperand::MO_Register:
+ case MachineOperand::MO_Register: {
assert (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Virtual registers should be already mapped!");
- O << '%' << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
+ unsigned Reg = MO.getReg();
+ if (Modifier && strncmp(Modifier, "subreg", 6) == 0) {
+ if (strncmp(Modifier + 7, "even", 4) == 0)
+ Reg = TRI->getSubReg(Reg, SystemZ::SUBREG_EVEN);
+ else if (strncmp(Modifier + 7, "odd", 3) == 0)
+ Reg = TRI->getSubReg(Reg, SystemZ::SUBREG_ODD);
+ else
+ assert(0 && "Invalid subreg modifier");
+ }
+
+ O << '%' << TRI->getAsmName(Reg);
return;
+ }
case MachineOperand::MO_Immediate:
O << MO.getImm();
return;