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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2014-01-09 10:49:40 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2014-01-09 10:49:40 +0000 |
| commit | 2984497cc1feb475d8ec97c9924dcc9bd02e0de0 (patch) | |
| tree | b0b062dc0fab2e5383a69cced69ae3eba758c57c /lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | |
| parent | c50299bab64d9232d992ec3c42b9d5ddf03e5001 (diff) | |
| download | llvm-2984497cc1feb475d8ec97c9924dcc9bd02e0de0.tar.gz llvm-2984497cc1feb475d8ec97c9924dcc9bd02e0de0.tar.bz2 llvm-2984497cc1feb475d8ec97c9924dcc9bd02e0de0.tar.xz | |
Match the InstCombine form of rotates by X+C
InstCombine converts (sub 32, (add X, C)) into (sub 32-C, X),
so a rotate left of a 32-bit Y by X+C could appear as either:
(or (shl Y, (add X, C)), (shr Y, (sub 32, (add X, C))))
without InstCombine or:
(or (shl Y, (add X, C)), (shr Y, (sub 32-C, X)))
with it.
We already matched the first form. This patch handles the second too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198860 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZISelDAGToDAG.cpp')
0 files changed, 0 insertions, 0 deletions