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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:28:35 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:28:35 +0000
commit745ca1eed7dc0a056b066f16aea750ce6fa8a530 (patch)
treefeaeaf870a71f81a3f4ecd2e422032047322a647 /lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
parent835e284214c6e920924b5375590e77fd953cbefe (diff)
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[SystemZ] Rename subregs and add subreg_h32
Use subreg_hNN and subreg_lNN for the high and low NN bits of a register. List the low registers first, so that subreg_l32 also means the low 32 bits of a 128-bit register. Floats are stored in the upper 32 bits of a 64-bit register, so they should use subreg_h32 rather than subreg_l32. No behavioral change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191659 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZISelDAGToDAG.cpp')
-rw-r--r--lib/Target/SystemZ/SystemZISelDAGToDAG.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index da935907ef..f8634a99de 100644
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -839,10 +839,10 @@ SDValue SystemZDAGToDAGISel::getUNDEF64(SDLoc DL) const {
SDValue SystemZDAGToDAGISel::convertTo(SDLoc DL, EVT VT, SDValue N) const {
if (N.getValueType() == MVT::i32 && VT == MVT::i64)
- return CurDAG->getTargetInsertSubreg(SystemZ::subreg_32bit,
+ return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32,
DL, VT, getUNDEF64(DL), N);
if (N.getValueType() == MVT::i64 && VT == MVT::i32)
- return CurDAG->getTargetExtractSubreg(SystemZ::subreg_32bit, DL, VT, N);
+ return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N);
assert(N.getValueType() == VT && "Unexpected value types");
return N;
}