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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:52:51 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:52:51 +0000 |
commit | 7d1e39b7c62265637ea821136e83aa66afa2aad4 (patch) | |
tree | 8eef8154248e2d460c25a9c784e113e9d863126e /lib/Target/SystemZ/SystemZISelLowering.h | |
parent | 4ec3e5ffd10b23c3614cd9a766c2a3ec1fe62ba4 (diff) | |
download | llvm-7d1e39b7c62265637ea821136e83aa66afa2aad4.tar.gz llvm-7d1e39b7c62265637ea821136e83aa66afa2aad4.tar.bz2 llvm-7d1e39b7c62265637ea821136e83aa66afa2aad4.tar.xz |
SELECT_CC lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75948 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZISelLowering.h')
-rw-r--r-- | lib/Target/SystemZ/SystemZISelLowering.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index 0f432bb3f7..51c3321658 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -32,9 +32,18 @@ namespace llvm { /// instruction, which includes a bunch of information. CALL, + /// CMP, UCMP - Compare instruction CMP, UCMP, - BRCOND + + /// BRCOND - Conditional branch. Operand 0 is chain operand, operand 1 is + /// the block to branch if condition is true, operand 2 is condition code + /// and operand 3 is the flag operand produced by a CMP instruction. + BRCOND, + + /// SELECT - Operands 0 and 1 are selection variables, operand 2 is + /// condition code and operand 3 is the flag operand. + SELECT }; } @@ -56,6 +65,7 @@ namespace llvm { SDValue LowerRET(SDValue Op, SelectionDAG &DAG); SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); + SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG); SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC); @@ -67,6 +77,10 @@ namespace llvm { ISD::CondCode CC, SDValue &SystemZCC, SelectionDAG &DAG); + + MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI, + MachineBasicBlock *BB) const; + private: const SystemZSubtarget &Subtarget; const SystemZTargetMachine &TM; |