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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-19 16:12:08 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-19 16:12:08 +0000 |
commit | 93c2125c3979bcb4656daf3c2fb5748fb3973e1a (patch) | |
tree | 15d86e2d86bbd74b5b6903c02965dd930c4156bd /lib/Target/SystemZ/SystemZInstrInfo.cpp | |
parent | eddfaad1ef9a208a8a9ee23c26fac4d980caa99a (diff) | |
download | llvm-93c2125c3979bcb4656daf3c2fb5748fb3973e1a.tar.gz llvm-93c2125c3979bcb4656daf3c2fb5748fb3973e1a.tar.bz2 llvm-93c2125c3979bcb4656daf3c2fb5748fb3973e1a.tar.xz |
[SystemZ] Use SLLK, SRLK and SRAK for codegen
This patch uses the instructions added in r186680 for codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186681 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.cpp')
-rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.cpp | 47 |
1 files changed, 45 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index bbac73fcaf..3a502a0117 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -12,9 +12,10 @@ //===----------------------------------------------------------------------===// #include "SystemZInstrInfo.h" +#include "SystemZTargetMachine.h" #include "SystemZInstrBuilder.h" +#include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/Target/TargetMachine.h" #define GET_INSTRINFO_CTOR #define GET_INSTRMAP_INFO @@ -24,7 +25,7 @@ using namespace llvm; SystemZInstrInfo::SystemZInstrInfo(SystemZTargetMachine &tm) : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP), - RI(tm) { + RI(tm), TM(tm) { } // MI is a 128-bit load or store. Split it into two 64-bit loads or stores, @@ -352,6 +353,48 @@ static bool isSimpleBD12Move(const MachineInstr *MI, unsigned Flag) { } MachineInstr * +SystemZInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, + MachineBasicBlock::iterator &MBBI, + LiveVariables *LV) const { + MachineInstr *MI = MBBI; + MachineBasicBlock *MBB = MI->getParent(); + + unsigned Opcode = MI->getOpcode(); + unsigned NumOps = MI->getNumOperands(); + + // Try to convert something like SLL into SLLK, if supported. + // We prefer to keep the two-operand form where possible both + // because it tends to be shorter and because some instructions + // have memory forms that can be used during spilling. + if (TM.getSubtargetImpl()->hasDistinctOps()) { + int ThreeOperandOpcode = SystemZ::getThreeOperandOpcode(Opcode); + if (ThreeOperandOpcode >= 0) { + unsigned DestReg = MI->getOperand(0).getReg(); + MachineOperand &Src = MI->getOperand(1); + MachineInstrBuilder MIB = BuildMI(*MBB, MBBI, MI->getDebugLoc(), + get(ThreeOperandOpcode), DestReg); + // Keep the kill state, but drop the tied flag. + MIB.addReg(Src.getReg(), getKillRegState(Src.isKill())); + // Keep the remaining operands as-is. + for (unsigned I = 2; I < NumOps; ++I) + MIB.addOperand(MI->getOperand(I)); + MachineInstr *NewMI = MIB; + + // Transfer killing information to the new instruction. + if (LV) { + for (unsigned I = 1; I < NumOps; ++I) { + MachineOperand &Op = MI->getOperand(I); + if (Op.isReg() && Op.isKill()) + LV->replaceKillInstruction(Op.getReg(), MI, NewMI); + } + } + return MIB; + } + } + return 0; +} + +MachineInstr * SystemZInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, const SmallVectorImpl<unsigned> &Ops, |