[SystemZ] Use MVC for simple load/store pairs

Look for patterns of the form (store (load ...), ...) in which the two
locations are known not to partially overlap.  (Identical locations are OK.)
These sequences are better implemented by MVC unless either the load or
the store could use RELATIVE LONG instructions.

The testcase showed that we weren't using LHRL and LGHRL for extload16,
only sextloadi16.  The patch fixes that too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185919 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 14 insertions, 0 deletions

diff --git a/lib/Target/SystemZ/SystemZPatterns.td b/lib/Target/SystemZ/SystemZPatterns.td
index fb6c2219df..74cc5f019a 100644
--- a/lib/Target/SystemZ/SystemZPatterns.td
+++ b/lib/Target/SystemZ/SystemZPatterns.td
@@ -65,3 +65,17 @@ multiclass InsertMem<string type, Instruction insn, RegisterOperand cls,
               (load mode:$src2), cls:$src1),
             (insn cls:$src1, mode:$src2)>;
 }
+
+// Use MVC instruction INSN for a load of type LOAD followed by a store
+// of type STORE.  VT is the type of the intermediate register and LENGTH
+// is the number of bytes to copy (which may be smaller than VT).
+multiclass MVCLoadStore<SDPatternOperator load, SDPatternOperator store,
+                        ValueType vt, Instruction insn, bits<5> length> {
+  def Pat : PatFrag<(ops node:$dest, node:$src),
+                    (store (vt (load node:$src)), node:$dest),
+                    [{ return storeLoadCanUseMVC(N); }]>;
+
+  def : Pat<(!cast<SDPatternOperator>(NAME##"Pat") bdaddr12only:$dest,
+                                                   bdaddr12only:$src),
+            (insn bdaddr12only:$dest, bdaddr12only:$src, length)>;
+}