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author | Dan Gohman <gohman@apple.com> | 2008-09-21 21:01:49 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-09-21 21:01:49 +0000 |
commit | 4893c067b767f5955ffedd722f33c11750c3e52b (patch) | |
tree | 85a192046a3cf5bb27a95f0f2700967eebed626f /lib/Target/TargetRegisterInfo.cpp | |
parent | 134eb73fc35e6ead3cfd3ed5024d0d7efa507441 (diff) | |
download | llvm-4893c067b767f5955ffedd722f33c11750c3e52b.tar.gz llvm-4893c067b767f5955ffedd722f33c11750c3e52b.tar.bz2 llvm-4893c067b767f5955ffedd722f33c11750c3e52b.tar.xz |
Instead of building a list and sorting it just to find a maximum element,
compute the maximum element directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56411 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/TargetRegisterInfo.cpp')
-rw-r--r-- | lib/Target/TargetRegisterInfo.cpp | 35 |
1 files changed, 9 insertions, 26 deletions
diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 5d8823bcb5..d9911e9e9a 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -35,17 +35,6 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, TargetRegisterInfo::~TargetRegisterInfo() {} -namespace { - // Sort according to super- / sub- class relations. - // i.e. super- register class < sub- register class. - struct RCCompare { - bool operator()(const TargetRegisterClass* const &LHS, - const TargetRegisterClass* const &RHS) { - return RHS->hasSuperClass(LHS); - } - }; -} - /// getPhysicalRegisterRegClass - Returns the Register Class of a physical /// register of the given type. If type is MVT::Other, then just return any /// register class the register belongs to. @@ -53,24 +42,18 @@ const TargetRegisterClass * TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const { assert(isPhysicalRegister(reg) && "reg must be a physical register"); - // Pick the register class of the right type that contains this physreg. - SmallVector<const TargetRegisterClass*, 4> RCs; + // Pick the most super register class of the right type that contains + // this physreg. + const TargetRegisterClass* BestRC = 0; for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ - if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg)) - RCs.push_back(*I); - } - - if (RCs.size() == 1) - return RCs[0]; - - if (RCs.size()) { - // Multiple compatible register classes. Get the super- class. - std::stable_sort(RCs.begin(), RCs.end(), RCCompare()); - return RCs[0]; + const TargetRegisterClass* RC = *I; + if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) && + (!BestRC || BestRC->hasSuperClass(RC))) + BestRC = RC; } - assert(false && "Couldn't find the register class"); - return 0; + assert(BestRC && "Couldn't find the register class"); + return BestRC; } /// getAllocatableSetForRC - Toggle the bits that represent allocatable |