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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-04 01:48:29 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-04 01:48:29 +0000 |
commit | 89e38f87211f6cf34c8b2e88a06c275a70c05421 (patch) | |
tree | a1e6b20b9a7ed9ae1baadc46816e9511d5b35c4e /lib/Target/TargetRegisterInfo.cpp | |
parent | d5003cafd6fc86acaf8e09ef0ca1dc899da8850e (diff) | |
download | llvm-89e38f87211f6cf34c8b2e88a06c275a70c05421.tar.gz llvm-89e38f87211f6cf34c8b2e88a06c275a70c05421.tar.bz2 llvm-89e38f87211f6cf34c8b2e88a06c275a70c05421.tar.xz |
Add a SuperRegClassIterator class.
This iterator class provides a more abstract interface to the (Idx,
Mask) lists of super-registers for a register class. The layout of the
tables shouldn't be exposed to clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/TargetRegisterInfo.cpp')
-rw-r--r-- | lib/Target/TargetRegisterInfo.cpp | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 3ae3fed5d5..d5518ea2c1 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -154,24 +154,22 @@ TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, assert(Idx && "Bad sub-register index"); // Find Idx in the list of super-register indices. - const uint16_t *SRI = B->getSuperRegIndices(); - unsigned Offset = 0; - while (SRI[Offset] != Idx) { - if (!SRI[Offset]) - return 0; - ++Offset; - } + const uint32_t *Mask = 0; + for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI) + if (RCI.getSubReg() == Idx) { + Mask = RCI.getMask(); + break; + } + if (!Mask) + return 0; - // The register class bit mask corresponding to SRI[Offset]. The bit mask - // contains all register classes that are projected into B by Idx. Find a - // class that is also a sub-class of A. - const unsigned RCMaskWords = (getNumRegClasses()+31)/32; - const uint32_t *TV = B->getSubClassMask() + (Offset + 1) * RCMaskWords; + // The bit mask contains all register classes that are projected into B by + // Idx. Find a class that is also a sub-class of A. const uint32_t *SC = A->getSubClassMask(); // Find the first common register class in TV and SC. - for (unsigned i = 0; i != RCMaskWords ; ++i) - if (unsigned Common = TV[i] & SC[i]) - return getRegClass(32*i + CountTrailingZeros_32(Common)); + for (unsigned Base = 0, BaseE = getNumRegClasses(); Base < BaseE; Base += 32) + if (unsigned Common = *Mask++ & *SC++) + return getRegClass(Base + CountTrailingZeros_32(Common)); return 0; } |