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| author | Chris Lattner <sabre@nondot.org> | 2003-08-21 20:37:17 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-08-21 20:37:17 +0000 |
| commit | f3526e22070a193c56f90be63aeca1d1829942b4 (patch) | |
| tree | 47d7b1a0a6500a52d968a94ca2391c31044409b6 /lib/Target/X86/Makefile | |
| parent | b1c125e2cda96ff64a8e35029cb6067633c7e8ad (diff) | |
| download | llvm-f3526e22070a193c56f90be63aeca1d1829942b4.tar.gz llvm-f3526e22070a193c56f90be63aeca1d1829942b4.tar.bz2 llvm-f3526e22070a193c56f90be63aeca1d1829942b4.tar.xz | |
Change all #include'd files to be :: rules instead of : rules
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8019 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Makefile')
| -rw-r--r-- | lib/Target/X86/Makefile | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile index ee4cf8c85c..a6bd3000d8 100644 --- a/lib/Target/X86/Makefile +++ b/lib/Target/X86/Makefile @@ -7,22 +7,22 @@ $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ X86GenRegisterInfo.inc X86GenInstrNames.inc \ X86GenInstrInfo.inc X86GenInstrSelector.inc -X86GenRegisterNames.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterNames.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-register-enums -o $@ -X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-register-desc-header -o $@ -X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-register-desc -o $@ -X86GenInstrNames.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-instr-enums -o $@ -X86GenInstrInfo.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-instr-desc -o $@ -X86GenInstrSelector.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-instr-selector -o $@ clean:: |