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authorEvan Cheng <evan.cheng@apple.com>2006-12-05 03:58:23 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-12-05 03:58:23 +0000
commitd9ff60b955022954101700f867dcf315ba7d818d (patch)
tree4820ca786cf503b7ac8b35e30e181221ca6092c0 /lib/Target/X86/README-X86-64.txt
parent57c699381bfde5f8d47079cd87e4f3e7fb9fca84 (diff)
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Update
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32214 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/README-X86-64.txt')
-rw-r--r--lib/Target/X86/README-X86-64.txt10
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diff --git a/lib/Target/X86/README-X86-64.txt b/lib/Target/X86/README-X86-64.txt
index af3e273237..a0ed3a3194 100644
--- a/lib/Target/X86/README-X86-64.txt
+++ b/lib/Target/X86/README-X86-64.txt
@@ -252,6 +252,16 @@ Note, however, we should continue to use RIP relative addressing mode as much as
possible. The above is actually one byte shorter than
movq $_dst, _ptr
+A better example is the code from PR1018. We are generating:
+ leaq xcalloc2(%rip), %rax
+ movq %rax, 8(%rsp)
+when we should be generating:
+ movq $xcalloc2, 8(%rsp)
+
+The reason the better codegen isn't done now is support for static small
+code model in JIT mode. The JIT cannot ensure that all GV's are placed in the
+lower 4G so we are not treating GV labels as 32-bit values.
+
//===---------------------------------------------------------------------===//
Right now the asm printer assumes GlobalAddress are accessed via RIP relative