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author | Evan Cheng <evan.cheng@apple.com> | 2006-09-08 06:48:29 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-09-08 06:48:29 +0000 |
commit | 25ab690a43cbbb591b76d49e3595b019c32f4b3f (patch) | |
tree | fe952a3e394b9f01b6ce8ed8691cee8c507ed094 /lib/Target/X86/X86.td | |
parent | 1e5fb6928c510bc945dbcd23d99022288ad7e863 (diff) | |
download | llvm-25ab690a43cbbb591b76d49e3595b019c32f4b3f.tar.gz llvm-25ab690a43cbbb591b76d49e3595b019c32f4b3f.tar.bz2 llvm-25ab690a43cbbb591b76d49e3595b019c32f4b3f.tar.xz |
Committing X86-64 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r-- | lib/Target/X86/X86.td | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index e15512db23..c4b3d8635f 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -20,8 +20,8 @@ include "../Target.td" // X86 Subtarget features. // -def Feature64Bit : SubtargetFeature<"64bit", "Is64Bit", "true", - "Enable 64-bit instructions">; +def Feature64Bit : SubtargetFeature<"64bit", "HasX86_64", "true", + "Support 64-bit instructions">; def FeatureMMX : SubtargetFeature<"mmx","X86SSELevel", "MMX", "Enable MMX instructions">; def FeatureSSE1 : SubtargetFeature<"sse", "X86SSELevel", "SSE1", @@ -61,6 +61,8 @@ def : Proc<"prescott", [FeatureMMX, FeatureSSE1, FeatureSSE2, FeatureSSE3]>; def : Proc<"nocona", [FeatureMMX, FeatureSSE1, FeatureSSE2, FeatureSSE3, Feature64Bit]>; +def : Proc<"core2", [FeatureMMX, FeatureSSE1, FeatureSSE2, + FeatureSSE3, Feature64Bit]>; def : Proc<"k6", [FeatureMMX]>; def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>; @@ -105,16 +107,20 @@ def X86InstrInfo : InstrInfo { // should be kept up-to-date with the fields in the X86InstrInfo.h file. let TSFlagsFields = ["FormBits", "hasOpSizePrefix", + "hasAdSizePrefix", "Prefix", + "hasREX_WPrefix", "ImmTypeBits", "FPFormBits", "Opcode"]; let TSFlagsShifts = [0, 6, 7, - 11, + 8, + 12, 13, - 16]; + 16, + 24]; } // The X86 target supports two different syntaxes for emitting machine code. |