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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-28 22:02:05 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-28 22:02:05 +0000
commit5ab29b504d49d3fa84d76f79e73704260f900682 (patch)
tree2326ad9d7d7f897f547d9cc9507312d40346d3ae /lib/Target/X86/X86.td
parentf822ee999f12e38eebf4a346f384d4bb302bdfad (diff)
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Each instruction now has both an ImmType and a MemType. This describes
the size of the immediate and the memory operand on instructions that use them. This resolves problems with instructions that take both a memory and an immediate operand but their sizes differ (i.e. ADDmi32b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r--lib/Target/X86/X86.td8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index d26ef9a73c..f92bfa10fc 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -33,10 +33,10 @@ def X86InstrInfo : InstrInfo {
// Define how we want to layout our TargetSpecific information field... This
// should be kept up-to-date with the fields in the X86InstrInfo.h file.
- let TSFlagsFields = ["FormBits" , "hasOpSizePrefix" , "Prefix", "TypeBits",
- "FPFormBits", "printImplicitUses", "Opcode"];
- let TSFlagsShifts = [ 0, 5, 6, 10,
- 13, 16, 17];
+ let TSFlagsFields = ["FormBits" , "hasOpSizePrefix" , "Prefix", "MemTypeBits",
+ "ImmTypeBits", "FPFormBits", "printImplicitUses", "Opcode"];
+ let TSFlagsShifts = [0, 5, 6, 10, 13,
+ 15, 18, 19];
}
def X86 : Target {