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author | Chris Lattner <sabre@nondot.org> | 2007-01-14 00:13:07 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-01-14 00:13:07 +0000 |
commit | 32c9a4527d77403598ca69886edffba0c922a1b5 (patch) | |
tree | dd9225248a3b0b38d1ae0b46ecee7b009d27b879 /lib/Target/X86/X86ATTAsmPrinter.cpp | |
parent | 65339307a55b094fed1321a4be960960e6483425 (diff) | |
download | llvm-32c9a4527d77403598ca69886edffba0c922a1b5.tar.gz llvm-32c9a4527d77403598ca69886edffba0c922a1b5.tar.bz2 llvm-32c9a4527d77403598ca69886edffba0c922a1b5.tar.xz |
Fix PR1103 and Regression/CodeGen/X86/2007-01-13-StackPtrIndex.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33189 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ATTAsmPrinter.cpp')
-rwxr-xr-x | lib/Target/X86/X86ATTAsmPrinter.cpp | 26 |
1 files changed, 17 insertions, 9 deletions
diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp index e37b6b2b53..96725f9405 100755 --- a/lib/Target/X86/X86ATTAsmPrinter.cpp +++ b/lib/Target/X86/X86ATTAsmPrinter.cpp @@ -382,10 +382,8 @@ void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) { void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op, const char *Modifier){ assert(isMem(MI, Op) && "Invalid memory reference!"); - - const MachineOperand &BaseReg = MI->getOperand(Op); - int ScaleVal = MI->getOperand(Op+1).getImmedValue(); - const MachineOperand &IndexReg = MI->getOperand(Op+2); + MachineOperand BaseReg = MI->getOperand(Op); + MachineOperand IndexReg = MI->getOperand(Op+2); const MachineOperand &DispSpec = MI->getOperand(Op+3); bool NotRIPRel = IndexReg.getReg() || BaseReg.getReg(); @@ -400,18 +398,28 @@ void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op, } if (IndexReg.getReg() || BaseReg.getReg()) { - O << "("; - if (BaseReg.getReg()) { - printOperand(MI, Op, Modifier); + unsigned ScaleVal = MI->getOperand(Op+1).getImmedValue(); + unsigned BaseRegOperand = 0, IndexRegOperand = 2; + + // There are cases where we can end up with ESP/RSP in the indexreg slot. + // If this happens, swap the base/index register to support assemblers that + // don't work when the index is *SP. + if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) { + assert(ScaleVal == 1 && "Scale not supported for stack pointer!"); + std::swap(BaseReg, IndexReg); + std::swap(BaseRegOperand, IndexRegOperand); } + + O << "("; + if (BaseReg.getReg()) + printOperand(MI, Op+BaseRegOperand, Modifier); if (IndexReg.getReg()) { O << ","; - printOperand(MI, Op+2, Modifier); + printOperand(MI, Op+IndexRegOperand, Modifier); if (ScaleVal != 1) O << "," << ScaleVal; } - O << ")"; } } |