diff options
| author | Juergen Ributzka <juergen@apple.com> | 2014-01-11 01:00:27 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-01-11 01:00:27 +0000 |
| commit | 4ab3e6c16417897c5f5ec5de457644388418425c (patch) | |
| tree | 57ed379ed87bf04ac71409f8cd888b74d4da11fa /lib/Target/X86/X86CallingConv.td | |
| parent | babad8b46e5cc841592d8bb26552b0683d41cd6d (diff) | |
| download | llvm-4ab3e6c16417897c5f5ec5de457644388418425c.tar.gz llvm-4ab3e6c16417897c5f5ec5de457644388418425c.tar.bz2 llvm-4ab3e6c16417897c5f5ec5de457644388418425c.tar.xz | |
[anyregcc] Fix callee-save mask for anyregcc
Use separate callee-save masks for XMM and YMM registers for anyregcc on X86 and
select the proper mask depending on the target cpu we compile for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198985 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CallingConv.td')
| -rw-r--r-- | lib/Target/X86/X86CallingConv.td | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td index 6185c1cd38..e733420e09 100644 --- a/lib/Target/X86/X86CallingConv.td +++ b/lib/Target/X86/X86CallingConv.td @@ -620,14 +620,15 @@ def CSR_64EHRet : CalleeSavedRegs<(add RAX, RDX, CSR_64)>; def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15, (sequence "XMM%u", 6, 15))>; -def CSR_MostRegs_64 : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10, +def CSR_64_MostRegs : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15, RBP, (sequence "XMM%u", 0, 15))>; -def CSR_AllRegs_64 : CalleeSavedRegs<(add CSR_MostRegs_64, RAX, RSP, - (sequence "XMM%u", 16, 31), - (sequence "YMM%u", 0, 31), - (sequence "ZMM%u", 0, 31))>; +def CSR_64_AllRegs : CalleeSavedRegs<(add CSR_64_MostRegs, RAX, RSP, + (sequence "XMM%u", 16, 31))>; +def CSR_64_AllRegs_AVX : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP, + (sequence "YMM%u", 0, 31)), + (sequence "XMM%u", 0, 15))>; // Standard C + YMM6-15 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, |