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author | Christopher Lamb <christopher.lamb@gmail.com> | 2007-07-29 01:24:57 +0000 |
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committer | Christopher Lamb <christopher.lamb@gmail.com> | 2007-07-29 01:24:57 +0000 |
commit | 2dc6dc619c89c739550a0fcab96a9f7eac3d9f15 (patch) | |
tree | 0ca7d8243585fccef5439a69d56b6a94d8fee754 /lib/Target/X86/X86CodeEmitter.cpp | |
parent | f9b90ea955bb7e2839e24885f4bbe6ddea2ee013 (diff) | |
download | llvm-2dc6dc619c89c739550a0fcab96a9f7eac3d9f15.tar.gz llvm-2dc6dc619c89c739550a0fcab96a9f7eac3d9f15.tar.bz2 llvm-2dc6dc619c89c739550a0fcab96a9f7eac3d9f15.tar.xz |
Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40578 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CodeEmitter.cpp')
-rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 9d5180452b..0a7beb251a 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -448,12 +448,6 @@ bool Emitter::isX86_64ExtendedReg(const MachineOperand &MO) { return false; } -inline static bool isX86_64TruncToByte(unsigned oc) { - return (oc == X86::TRUNC_64to8 || oc == X86::TRUNC_32to8 || - oc == X86::TRUNC_16to8); -} - - inline static bool isX86_64NonExtLowByteReg(unsigned reg) { return (reg == X86::SPL || reg == X86::BPL || reg == X86::SIL || reg == X86::DIL); @@ -465,7 +459,6 @@ inline static bool isX86_64NonExtLowByteReg(unsigned reg) { unsigned Emitter::determineREX(const MachineInstr &MI) { unsigned REX = 0; const TargetInstrDescriptor *Desc = MI.getInstrDescriptor(); - unsigned Opcode = Desc->Opcode; // Pseudo instructions do not need REX prefix byte. if ((Desc->TSFlags & X86II::FormMask) == X86II::Pseudo) @@ -479,16 +472,11 @@ unsigned Emitter::determineREX(const MachineInstr &MI) { Desc->getOperandConstraint(1, TOI::TIED_TO) != -1; // If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX prefix. - bool isTrunc8 = isX86_64TruncToByte(Opcode); unsigned i = isTwoAddr ? 1 : 0; for (unsigned e = NumOps; i != e; ++i) { const MachineOperand& MO = MI.getOperand(i); if (MO.isRegister()) { unsigned Reg = MO.getReg(); - // Trunc to byte are actually movb. The real source operand is the low - // byte of the register. - if (isTrunc8 && i == 1) - Reg = getX86SubSuperRegister(Reg, MVT::i8); if (isX86_64NonExtLowByteReg(Reg)) REX |= 0x40; } |