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author | Tim Northover <tnorthover@apple.com> | 2013-06-01 10:21:54 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2013-06-01 10:21:54 +0000 |
commit | 4d3ace4da0a000428ad5baea72c82e585fcd531c (patch) | |
tree | 66c5923c37863d50948cf02c0ac8e8c34ed846a1 /lib/Target/X86/X86ISelDAGToDAG.cpp | |
parent | 85c622d6b6633c19d2729e82453c6c7f56ee7cd9 (diff) | |
download | llvm-4d3ace4da0a000428ad5baea72c82e585fcd531c.tar.gz llvm-4d3ace4da0a000428ad5baea72c82e585fcd531c.tar.bz2 llvm-4d3ace4da0a000428ad5baea72c82e585fcd531c.tar.xz |
TMP: LEA64_32r fixing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183069 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 02f5fe4952..f9979a59d5 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -204,6 +204,9 @@ namespace { bool SelectLEAAddr(SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment); + bool SelectLEA64_32Addr(SDValue N, SDValue &Base, + SDValue &Scale, SDValue &Index, SDValue &Disp, + SDValue &Segment); bool SelectTLSADDRAddr(SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment); @@ -1394,7 +1397,8 @@ bool X86DAGToDAGISel::SelectMOV64Imm32(SDValue N, SDValue &Imm) { // In static codegen with small code model, we can get the address of a label // into a register with 'movl'. TableGen has already made sure we're looking // at a label of some kind. - assert(N->getOpcode() == X86ISD::Wrapper && "Unexpected node type for MOV32ri64"); + assert(N->getOpcode() == X86ISD::Wrapper && + "Unexpected node type for MOV32ri64"); N = N.getOperand(0); if (N->getOpcode() != ISD::TargetConstantPool && @@ -1408,6 +1412,43 @@ bool X86DAGToDAGISel::SelectMOV64Imm32(SDValue N, SDValue &Imm) { return TM.getCodeModel() == CodeModel::Small; } +bool X86DAGToDAGISel::SelectLEA64_32Addr(SDValue N, SDValue &Base, + SDValue &Scale, SDValue &Index, + SDValue &Disp, SDValue &Segment) { + if (!SelectLEAAddr(N, Base, Scale, Index, Disp, Segment)) + return false; + + SDLoc DL(N); + RegisterSDNode *RN = dyn_cast<RegisterSDNode>(Base); + if (RN && RN->getReg() == 0) + Base = CurDAG->getRegister(0, MVT::i64); + else if (Base.getValueType() == MVT::i32) { + // Base could already be %rip, particularly in the x32 ABI. + Base = SDValue(CurDAG->getMachineNode( + TargetOpcode::SUBREG_TO_REG, DL, MVT::i64, + CurDAG->getTargetConstant(0, MVT::i64), + Base, + CurDAG->getTargetConstant(X86::sub_32bit, MVT::i32)), + 0); + } + + RN = dyn_cast<RegisterSDNode>(Index); + if (RN && RN->getReg() == 0) + Index = CurDAG->getRegister(0, MVT::i64); + else { + assert(Index.getValueType() == MVT::i32 && + "Expect to be extending 32-bit registers for use in LEA"); + Index = SDValue(CurDAG->getMachineNode( + TargetOpcode::SUBREG_TO_REG, DL, MVT::i64, + CurDAG->getTargetConstant(0, MVT::i64), + Index, + CurDAG->getTargetConstant(X86::sub_32bit, MVT::i32)), + 0); + } + + return true; +} + /// SelectLEAAddr - it calls SelectAddr and determines if the maximal addressing /// mode it matches can be cost effectively emitted as an LEA instruction. bool X86DAGToDAGISel::SelectLEAAddr(SDValue N, |