diff options
| author | Michael Liao <michael.liao@intel.com> | 2013-06-05 18:12:26 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-06-05 18:12:26 +0000 |
| commit | 9a508ef64a194f0f4a3362c55a6e33bec18b7554 (patch) | |
| tree | 6bfbf25677071a5f26b10630d09ac4bb6ba67f63 /lib/Target/X86/X86ISelDAGToDAG.cpp | |
| parent | bcb1ea8ef62fba49d0e634e1943f829687323314 (diff) | |
| download | llvm-9a508ef64a194f0f4a3362c55a6e33bec18b7554.tar.gz llvm-9a508ef64a194f0f4a3362c55a6e33bec18b7554.tar.bz2 llvm-9a508ef64a194f0f4a3362c55a6e33bec18b7554.tar.xz | |
[PATCH] Fix VGATHER* operand constraints
Add earlyclobber constaints to prevent input register being allocated as
the output register because, according to Intel spec [1], "If any pair
of the index, mask, or destination registers are the same, this
instruction results a UD fault."
---
[1] http://software.intel.com/sites/default/files/319433-014.pdf
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183327 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelDAGToDAG.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 02f5fe4952..14ec2ddb4e 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -2041,6 +2041,8 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) { case Intrinsic::x86_avx2_gather_d_d_256: case Intrinsic::x86_avx2_gather_q_d: case Intrinsic::x86_avx2_gather_q_d_256: { + if (!Subtarget->hasAVX2()) + break; unsigned Opc; switch (IntNo) { default: llvm_unreachable("Impossible intrinsic"); |