summaryrefslogtreecommitdiff
path: root/lib/Target/X86/X86ISelDAGToDAG.cpp
diff options
context:
space:
mode:
authorTim Northover <tnorthover@apple.com>2013-09-19 11:33:53 +0000
committerTim Northover <tnorthover@apple.com>2013-09-19 11:33:53 +0000
commitadadf887cb57f8281ec23f846a946fb59bd0a0d7 (patch)
treef156053463832460ca53c51e9584350751d47afc /lib/Target/X86/X86ISelDAGToDAG.cpp
parentabe68f59174c7418ae73de0a87587abe0be1fb03 (diff)
downloadllvm-adadf887cb57f8281ec23f846a946fb59bd0a0d7.tar.gz
llvm-adadf887cb57f8281ec23f846a946fb59bd0a0d7.tar.bz2
llvm-adadf887cb57f8281ec23f846a946fb59bd0a0d7.tar.xz
X86: FrameIndex addressing modes do have a base register.
When selecting the DAG (add (WrapperRIP ...), (FrameIndex ...)), X86 code had spotted the FrameIndex possibility and was working out whether it could fold the WrapperRIP into this. The test for forming a %rip version is notionally whether we already have a base or index register (%rip precludes both), but we were forgetting to account for the register that would be inserted later to access the frame. rdar://problem/15024520 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190995 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelDAGToDAG.cpp')
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 33c80c750e..32ad1aaa60 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -79,7 +79,8 @@ namespace {
}
bool hasBaseOrIndexReg() const {
- return IndexReg.getNode() != 0 || Base_Reg.getNode() != 0;
+ return BaseType == FrameIndexBase ||
+ IndexReg.getNode() != 0 || Base_Reg.getNode() != 0;
}
/// isRIPRelative - Return true if this addressing mode is already RIP