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| author | Adam Nemet <anemet@apple.com> | 2014-03-12 21:20:55 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2014-03-12 21:20:55 +0000 |
| commit | a65ca9dcf0a7e4889a3130fa83e5e3045893a27b (patch) | |
| tree | e0b2557dbcb104581d06b055c6c7cae89216bcce /lib/Target/X86/X86InstrCompiler.td | |
| parent | 9367c49f5de071784c732bbafeb66bf6a56c040f (diff) | |
| download | llvm-a65ca9dcf0a7e4889a3130fa83e5e3045893a27b.tar.gz llvm-a65ca9dcf0a7e4889a3130fa83e5e3045893a27b.tar.bz2 llvm-a65ca9dcf0a7e4889a3130fa83e5e3045893a27b.tar.xz | |
[X86] Add peephole for masked rotate amount
Extend what's currently done for shift because the HW performs this masking
implicitly:
(rotl:i32 x, (and y, 31)) -> (rotl:i32 x, y)
I use the newly factored out multiclass that was only supporting shifts so
far.
For testing I extended my testcase for the new rotation idiom.
<rdar://problem/15295856>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203718 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrCompiler.td')
| -rw-r--r-- | lib/Target/X86/X86InstrCompiler.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td index 370e4d875c..401849f40e 100644 --- a/lib/Target/X86/X86InstrCompiler.td +++ b/lib/Target/X86/X86InstrCompiler.td @@ -1556,6 +1556,8 @@ multiclass MaskedShiftAmountPats<SDNode frag, string name> { defm : MaskedShiftAmountPats<shl, "SHL">; defm : MaskedShiftAmountPats<srl, "SHR">; defm : MaskedShiftAmountPats<sra, "SAR">; +defm : MaskedShiftAmountPats<rotl, "ROL">; +defm : MaskedShiftAmountPats<rotr, "ROR">; // (anyext (setcc_carry)) -> (setcc_carry) def : Pat<(i16 (anyext (i8 (X86setcc_c X86_COND_B, EFLAGS)))), |