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| author | Evan Cheng <evan.cheng@apple.com> | 2008-08-28 23:48:31 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-08-28 23:48:31 +0000 |
| commit | 4d46d0af583b95a5d4f7d490f542c4fb65b9e824 (patch) | |
| tree | 0384768491997c341ecb57a52b9e1cf7a299f65b /lib/Target/X86/X86InstrInfo.cpp | |
| parent | 37f25d989a3054b4742f6c92af94a312c26ffb2b (diff) | |
| download | llvm-4d46d0af583b95a5d4f7d490f542c4fb65b9e824.tar.gz llvm-4d46d0af583b95a5d4f7d490f542c4fb65b9e824.tar.bz2 llvm-4d46d0af583b95a5d4f7d490f542c4fb65b9e824.tar.xz | |
Swap fp comparison operands and change predicate to allow load folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index bcbebcd45d..6066e5cf66 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -1433,6 +1433,30 @@ X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) { } } +/// GetSwappedBranchCondition - Return the branch condition that would be +/// the result of exchanging the two operands of a comparison without +/// changing the result produced. +/// e.g. COND_E to COND_E, COND_G -> COND_L +X86::CondCode X86::GetSwappedBranchCondition(X86::CondCode CC) { + switch (CC) { + default: assert(0 && "Illegal condition code!"); + case X86::COND_E: return X86::COND_E; + case X86::COND_NE: return X86::COND_NE; + case X86::COND_L: return X86::COND_G; + case X86::COND_LE: return X86::COND_GE; + case X86::COND_G: return X86::COND_L; + case X86::COND_GE: return X86::COND_LE; + case X86::COND_B: return X86::COND_A; + case X86::COND_BE: return X86::COND_AE; + case X86::COND_A: return X86::COND_B; + case X86::COND_AE: return X86::COND_BE; + case X86::COND_P: return X86::COND_P; + case X86::COND_NP: return X86::COND_NP; + case X86::COND_O: return X86::COND_O; + case X86::COND_NO: return X86::COND_NO; + } +} + bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const { const TargetInstrDesc &TID = MI->getDesc(); if (!TID.isTerminator()) return false; @@ -2373,7 +2397,8 @@ bool X86InstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { bool X86InstrInfo:: ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { assert(Cond.size() == 1 && "Invalid X86 branch condition!"); - Cond[0].setImm(GetOppositeBranchCondition((X86::CondCode)Cond[0].getImm())); + X86::CondCode CC = static_cast<X86::CondCode>(Cond[0].getImm()); + Cond[0].setImm(GetOppositeBranchCondition(CC)); return false; } |